I2C_TX_CTRL1

Macros
#define	MXC_F_I2C_TX_CTRL1_TXRDY_POS   0
#define	MXC_F_I2C_TX_CTRL1_TXRDY   ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL1_TXRDY_POS))
#define	MXC_V_I2C_TX_CTRL1_TXRDY_NOT_READY   ((uint32_t)0x0UL)
#define	MXC_S_I2C_TX_CTRL1_TXRDY_NOT_READY   (MXC_V_I2C_TX_CTRL1_TXRDY_NOT_READY << MXC_F_I2C_TX_CTRL1_TXRDY_POS)
#define	MXC_V_I2C_TX_CTRL1_TXRDY_READY   ((uint32_t)0x1UL)
#define	MXC_S_I2C_TX_CTRL1_TXRDY_READY   (MXC_V_I2C_TX_CTRL1_TXRDY_READY << MXC_F_I2C_TX_CTRL1_TXRDY_POS)
#define	MXC_F_I2C_TX_CTRL1_TXLAST_POS   1
#define	MXC_F_I2C_TX_CTRL1_TXLAST   ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL1_TXLAST_POS))
#define	MXC_V_I2C_TX_CTRL1_TXLAST_PAUSE_ON_LAST   ((uint32_t)0x0UL)
#define	MXC_S_I2C_TX_CTRL1_TXLAST_PAUSE_ON_LAST   (MXC_V_I2C_TX_CTRL1_TXLAST_PAUSE_ON_LAST << MXC_F_I2C_TX_CTRL1_TXLAST_POS)
#define	MXC_V_I2C_TX_CTRL1_TXLAST_END_ON_LAST   ((uint32_t)0x1UL)
#define	MXC_S_I2C_TX_CTRL1_TXLAST_END_ON_LAST   (MXC_V_I2C_TX_CTRL1_TXLAST_END_ON_LAST << MXC_F_I2C_TX_CTRL1_TXLAST_POS)
#define	MXC_F_I2C_TX_CTRL1_TXFIFO_POS   8
#define	MXC_F_I2C_TX_CTRL1_TXFIFO   ((uint32_t)(0xFUL << MXC_F_I2C_TX_CTRL1_TXFIFO_POS))

Detailed Description

Transmit Control Register 1.

Macro Definition Documentation

MXC_F_I2C_TX_CTRL1_TXFIFO

#define MXC_F_I2C_TX_CTRL1_TXFIFO   ((uint32_t)(0xFUL << MXC_F_I2C_TX_CTRL1_TXFIFO_POS))

TX_CTRL1_TXFIFO Mask

MXC_F_I2C_TX_CTRL1_TXFIFO_POS

#define MXC_F_I2C_TX_CTRL1_TXFIFO_POS   8

TX_CTRL1_TXFIFO Position

MXC_F_I2C_TX_CTRL1_TXLAST

#define MXC_F_I2C_TX_CTRL1_TXLAST   ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL1_TXLAST_POS))

TX_CTRL1_TXLAST Mask

MXC_F_I2C_TX_CTRL1_TXLAST_POS

#define MXC_F_I2C_TX_CTRL1_TXLAST_POS   1

TX_CTRL1_TXLAST Position

MXC_F_I2C_TX_CTRL1_TXRDY

#define MXC_F_I2C_TX_CTRL1_TXRDY   ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL1_TXRDY_POS))

TX_CTRL1_TXRDY Mask

MXC_F_I2C_TX_CTRL1_TXRDY_POS

#define MXC_F_I2C_TX_CTRL1_TXRDY_POS   0

TX_CTRL1_TXRDY Position

MXC_S_I2C_TX_CTRL1_TXLAST_END_ON_LAST

#define MXC_S_I2C_TX_CTRL1_TXLAST_END_ON_LAST   (MXC_V_I2C_TX_CTRL1_TXLAST_END_ON_LAST << MXC_F_I2C_TX_CTRL1_TXLAST_POS)

TX_CTRL1_TXLAST_END_ON_LAST Setting

MXC_S_I2C_TX_CTRL1_TXLAST_PAUSE_ON_LAST

#define MXC_S_I2C_TX_CTRL1_TXLAST_PAUSE_ON_LAST   (MXC_V_I2C_TX_CTRL1_TXLAST_PAUSE_ON_LAST << MXC_F_I2C_TX_CTRL1_TXLAST_POS)

TX_CTRL1_TXLAST_PAUSE_ON_LAST Setting

MXC_S_I2C_TX_CTRL1_TXRDY_NOT_READY

#define MXC_S_I2C_TX_CTRL1_TXRDY_NOT_READY   (MXC_V_I2C_TX_CTRL1_TXRDY_NOT_READY << MXC_F_I2C_TX_CTRL1_TXRDY_POS)

TX_CTRL1_TXRDY_NOT_READY Setting

MXC_S_I2C_TX_CTRL1_TXRDY_READY

#define MXC_S_I2C_TX_CTRL1_TXRDY_READY   (MXC_V_I2C_TX_CTRL1_TXRDY_READY << MXC_F_I2C_TX_CTRL1_TXRDY_POS)

TX_CTRL1_TXRDY_READY Setting

MXC_V_I2C_TX_CTRL1_TXLAST_END_ON_LAST

#define MXC_V_I2C_TX_CTRL1_TXLAST_END_ON_LAST   ((uint32_t)0x1UL)

TX_CTRL1_TXLAST_END_ON_LAST Value

MXC_V_I2C_TX_CTRL1_TXLAST_PAUSE_ON_LAST

#define MXC_V_I2C_TX_CTRL1_TXLAST_PAUSE_ON_LAST   ((uint32_t)0x0UL)

TX_CTRL1_TXLAST_PAUSE_ON_LAST Value

MXC_V_I2C_TX_CTRL1_TXRDY_NOT_READY

#define MXC_V_I2C_TX_CTRL1_TXRDY_NOT_READY   ((uint32_t)0x0UL)

TX_CTRL1_TXRDY_NOT_READY Value

MXC_V_I2C_TX_CTRL1_TXRDY_READY

#define MXC_V_I2C_TX_CTRL1_TXRDY_READY   ((uint32_t)0x1UL)

TX_CTRL1_TXRDY_READY Value