Register Offsets

Macros
#define	MXC_R_PTG_ENABLE   ((uint32_t)0x00000000UL)
#define	MXC_R_PTG_RESYNC   ((uint32_t)0x00000004UL)
#define	MXC_R_PTG_INTFL   ((uint32_t)0x00000008UL)
#define	MXC_R_PTG_INTEN   ((uint32_t)0x0000000CUL)
#define	MXC_R_PTG_SAFE_EN   ((uint32_t)0x00000010UL)
#define	MXC_R_PTG_SAFE_DIS   ((uint32_t)0x00000014UL)

Detailed Description

PTG Peripheral Register Offsets from the PTG Base Peripheral Address.

Macro Definition Documentation

MXC_R_PTG_ENABLE

#define MXC_R_PTG_ENABLE   ((uint32_t)0x00000000UL)

Offset from PTG Base Address: 0x0000

MXC_R_PTG_INTEN

#define MXC_R_PTG_INTEN   ((uint32_t)0x0000000CUL)

Offset from PTG Base Address: 0x000C

MXC_R_PTG_INTFL

#define MXC_R_PTG_INTFL   ((uint32_t)0x00000008UL)

Offset from PTG Base Address: 0x0008

MXC_R_PTG_RESYNC

#define MXC_R_PTG_RESYNC   ((uint32_t)0x00000004UL)

Offset from PTG Base Address: 0x0004

MXC_R_PTG_SAFE_DIS

#define MXC_R_PTG_SAFE_DIS   ((uint32_t)0x00000014UL)

Offset from PTG Base Address: 0x0014

MXC_R_PTG_SAFE_EN

#define MXC_R_PTG_SAFE_EN   ((uint32_t)0x00000010UL)

Offset from PTG Base Address: 0x0010