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MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
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RTC Control Register.
#define MXC_F_RTC_CTRL_ACRE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ACRE_POS)) |
CTRL_ACRE Mask
#define MXC_F_RTC_CTRL_ACRE_POS 14 |
CTRL_ACRE Position
#define MXC_F_RTC_CTRL_BUSY ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_BUSY_POS)) |
CTRL_BUSY Mask
#define MXC_F_RTC_CTRL_BUSY_POS 3 |
CTRL_BUSY Position
#define MXC_F_RTC_CTRL_ENABLE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ENABLE_POS)) |
CTRL_ENABLE Mask
#define MXC_F_RTC_CTRL_ENABLE_POS 0 |
CTRL_ENABLE Position
#define MXC_F_RTC_CTRL_FREQ_SEL ((uint32_t)(0x3UL << MXC_F_RTC_CTRL_FREQ_SEL_POS)) |
CTRL_FREQ_SEL Mask
#define MXC_F_RTC_CTRL_FREQ_SEL_POS 9 |
CTRL_FREQ_SEL Position
#define MXC_F_RTC_CTRL_READY ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_READY_POS)) |
CTRL_READY Mask
#define MXC_F_RTC_CTRL_READY_INT_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_READY_INT_EN_POS)) |
CTRL_READY_INT_EN Mask
#define MXC_F_RTC_CTRL_READY_INT_EN_POS 5 |
CTRL_READY_INT_EN Position
#define MXC_F_RTC_CTRL_READY_POS 4 |
CTRL_READY Position
#define MXC_F_RTC_CTRL_SQWOUT_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SQWOUT_EN_POS)) |
CTRL_SQWOUT_EN Mask
#define MXC_F_RTC_CTRL_SQWOUT_EN_POS 8 |
CTRL_SQWOUT_EN Position
#define MXC_F_RTC_CTRL_SSEC_ALARM_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS)) |
CTRL_SSEC_ALARM_EN Mask
#define MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS 2 |
CTRL_SSEC_ALARM_EN Position
#define MXC_F_RTC_CTRL_SSEC_ALARM_FL ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS)) |
CTRL_SSEC_ALARM_FL Mask
#define MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS 7 |
CTRL_SSEC_ALARM_FL Position
#define MXC_F_RTC_CTRL_TOD_ALARM_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_TOD_ALARM_EN_POS)) |
CTRL_TOD_ALARM_EN Mask
#define MXC_F_RTC_CTRL_TOD_ALARM_EN_POS 1 |
CTRL_TOD_ALARM_EN Position
#define MXC_F_RTC_CTRL_TOD_ALARM_FL ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_TOD_ALARM_FL_POS)) |
CTRL_TOD_ALARM_FL Mask
#define MXC_F_RTC_CTRL_TOD_ALARM_FL_POS 6 |
CTRL_TOD_ALARM_FL Position
#define MXC_F_RTC_CTRL_WRITE_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_WRITE_EN_POS)) |
CTRL_WRITE_EN Mask
#define MXC_F_RTC_CTRL_WRITE_EN_POS 15 |
CTRL_WRITE_EN Position
#define MXC_S_RTC_CTRL_ACRE_ASYNC (MXC_V_RTC_CTRL_ACRE_ASYNC << MXC_F_RTC_CTRL_ACRE_POS) |
CTRL_ACRE_ASYNC Setting
#define MXC_S_RTC_CTRL_ACRE_SYNC (MXC_V_RTC_CTRL_ACRE_SYNC << MXC_F_RTC_CTRL_ACRE_POS) |
CTRL_ACRE_SYNC Setting
#define MXC_S_RTC_CTRL_BUSY_BUSY (MXC_V_RTC_CTRL_BUSY_BUSY << MXC_F_RTC_CTRL_BUSY_POS) |
CTRL_BUSY_BUSY Setting
#define MXC_S_RTC_CTRL_BUSY_IDLE (MXC_V_RTC_CTRL_BUSY_IDLE << MXC_F_RTC_CTRL_BUSY_POS) |
CTRL_BUSY_IDLE Setting
#define MXC_S_RTC_CTRL_ENABLE_DIS (MXC_V_RTC_CTRL_ENABLE_DIS << MXC_F_RTC_CTRL_ENABLE_POS) |
CTRL_ENABLE_DIS Setting
#define MXC_S_RTC_CTRL_ENABLE_EN (MXC_V_RTC_CTRL_ENABLE_EN << MXC_F_RTC_CTRL_ENABLE_POS) |
CTRL_ENABLE_EN Setting
#define MXC_S_RTC_CTRL_FREQ_SEL_FREQ1HZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ1HZ << MXC_F_RTC_CTRL_FREQ_SEL_POS) |
CTRL_FREQ_SEL_FREQ1HZ Setting
#define MXC_S_RTC_CTRL_FREQ_SEL_FREQ4KHZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ4KHZ << MXC_F_RTC_CTRL_FREQ_SEL_POS) |
CTRL_FREQ_SEL_FREQ4KHZ Setting
#define MXC_S_RTC_CTRL_FREQ_SEL_FREQ512HZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ512HZ << MXC_F_RTC_CTRL_FREQ_SEL_POS) |
CTRL_FREQ_SEL_FREQ512HZ Setting
#define MXC_S_RTC_CTRL_READY_INT_EN_DIS (MXC_V_RTC_CTRL_READY_INT_EN_DIS << MXC_F_RTC_CTRL_READY_INT_EN_POS) |
CTRL_READY_INT_EN_DIS Setting
#define MXC_S_RTC_CTRL_READY_INT_EN_EN (MXC_V_RTC_CTRL_READY_INT_EN_EN << MXC_F_RTC_CTRL_READY_INT_EN_POS) |
CTRL_READY_INT_EN_EN Setting
#define MXC_S_RTC_CTRL_READY_NOT_READY (MXC_V_RTC_CTRL_READY_NOT_READY << MXC_F_RTC_CTRL_READY_POS) |
CTRL_READY_NOT_READY Setting
#define MXC_S_RTC_CTRL_READY_READY (MXC_V_RTC_CTRL_READY_READY << MXC_F_RTC_CTRL_READY_POS) |
CTRL_READY_READY Setting
#define MXC_S_RTC_CTRL_SQWOUT_EN_DIS (MXC_V_RTC_CTRL_SQWOUT_EN_DIS << MXC_F_RTC_CTRL_SQWOUT_EN_POS) |
CTRL_SQWOUT_EN_DIS Setting
#define MXC_S_RTC_CTRL_SQWOUT_EN_EN (MXC_V_RTC_CTRL_SQWOUT_EN_EN << MXC_F_RTC_CTRL_SQWOUT_EN_POS) |
CTRL_SQWOUT_EN_EN Setting
#define MXC_S_RTC_CTRL_SSEC_ALARM_EN_DIS (MXC_V_RTC_CTRL_SSEC_ALARM_EN_DIS << MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS) |
CTRL_SSEC_ALARM_EN_DIS Setting
#define MXC_S_RTC_CTRL_SSEC_ALARM_EN_EN (MXC_V_RTC_CTRL_SSEC_ALARM_EN_EN << MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS) |
CTRL_SSEC_ALARM_EN_EN Setting
#define MXC_S_RTC_CTRL_SSEC_ALARM_FL_INACTIVE (MXC_V_RTC_CTRL_SSEC_ALARM_FL_INACTIVE << MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS) |
CTRL_SSEC_ALARM_FL_INACTIVE Setting
#define MXC_S_RTC_CTRL_SSEC_ALARM_FL_PENDING (MXC_V_RTC_CTRL_SSEC_ALARM_FL_PENDING << MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS) |
CTRL_SSEC_ALARM_FL_PENDING Setting
#define MXC_S_RTC_CTRL_TOD_ALARM_EN_DIS (MXC_V_RTC_CTRL_TOD_ALARM_EN_DIS << MXC_F_RTC_CTRL_TOD_ALARM_EN_POS) |
CTRL_TOD_ALARM_EN_DIS Setting
#define MXC_S_RTC_CTRL_TOD_ALARM_EN_EN (MXC_V_RTC_CTRL_TOD_ALARM_EN_EN << MXC_F_RTC_CTRL_TOD_ALARM_EN_POS) |
CTRL_TOD_ALARM_EN_EN Setting
#define MXC_S_RTC_CTRL_TOD_ALARM_FL_INACTIVE (MXC_V_RTC_CTRL_TOD_ALARM_FL_INACTIVE << MXC_F_RTC_CTRL_TOD_ALARM_FL_POS) |
CTRL_TOD_ALARM_FL_INACTIVE Setting
#define MXC_S_RTC_CTRL_TOD_ALARM_FL_PENDING (MXC_V_RTC_CTRL_TOD_ALARM_FL_PENDING << MXC_F_RTC_CTRL_TOD_ALARM_FL_POS) |
CTRL_TOD_ALARM_FL_PENDING Setting
#define MXC_S_RTC_CTRL_WRITE_EN_DIS (MXC_V_RTC_CTRL_WRITE_EN_DIS << MXC_F_RTC_CTRL_WRITE_EN_POS) |
CTRL_WRITE_EN_DIS Setting
#define MXC_S_RTC_CTRL_WRITE_EN_EN (MXC_V_RTC_CTRL_WRITE_EN_EN << MXC_F_RTC_CTRL_WRITE_EN_POS) |
CTRL_WRITE_EN_EN Setting
#define MXC_V_RTC_CTRL_ACRE_ASYNC ((uint32_t)0x1UL) |
CTRL_ACRE_ASYNC Value
#define MXC_V_RTC_CTRL_ACRE_SYNC ((uint32_t)0x0UL) |
CTRL_ACRE_SYNC Value
#define MXC_V_RTC_CTRL_BUSY_BUSY ((uint32_t)0x1UL) |
CTRL_BUSY_BUSY Value
#define MXC_V_RTC_CTRL_BUSY_IDLE ((uint32_t)0x0UL) |
CTRL_BUSY_IDLE Value
#define MXC_V_RTC_CTRL_ENABLE_DIS ((uint32_t)0x0UL) |
CTRL_ENABLE_DIS Value
#define MXC_V_RTC_CTRL_ENABLE_EN ((uint32_t)0x1UL) |
CTRL_ENABLE_EN Value
#define MXC_V_RTC_CTRL_FREQ_SEL_FREQ1HZ ((uint32_t)0x0UL) |
CTRL_FREQ_SEL_FREQ1HZ Value
#define MXC_V_RTC_CTRL_FREQ_SEL_FREQ4KHZ ((uint32_t)0x2UL) |
CTRL_FREQ_SEL_FREQ4KHZ Value
#define MXC_V_RTC_CTRL_FREQ_SEL_FREQ512HZ ((uint32_t)0x1UL) |
CTRL_FREQ_SEL_FREQ512HZ Value
#define MXC_V_RTC_CTRL_READY_INT_EN_DIS ((uint32_t)0x0UL) |
CTRL_READY_INT_EN_DIS Value
#define MXC_V_RTC_CTRL_READY_INT_EN_EN ((uint32_t)0x1UL) |
CTRL_READY_INT_EN_EN Value
#define MXC_V_RTC_CTRL_READY_NOT_READY ((uint32_t)0x0UL) |
CTRL_READY_NOT_READY Value
#define MXC_V_RTC_CTRL_READY_READY ((uint32_t)0x1UL) |
CTRL_READY_READY Value
#define MXC_V_RTC_CTRL_SQWOUT_EN_DIS ((uint32_t)0x0UL) |
CTRL_SQWOUT_EN_DIS Value
#define MXC_V_RTC_CTRL_SQWOUT_EN_EN ((uint32_t)0x1UL) |
CTRL_SQWOUT_EN_EN Value
#define MXC_V_RTC_CTRL_SSEC_ALARM_EN_DIS ((uint32_t)0x0UL) |
CTRL_SSEC_ALARM_EN_DIS Value
#define MXC_V_RTC_CTRL_SSEC_ALARM_EN_EN ((uint32_t)0x1UL) |
CTRL_SSEC_ALARM_EN_EN Value
#define MXC_V_RTC_CTRL_SSEC_ALARM_FL_INACTIVE ((uint32_t)0x0UL) |
CTRL_SSEC_ALARM_FL_INACTIVE Value
#define MXC_V_RTC_CTRL_SSEC_ALARM_FL_PENDING ((uint32_t)0x1UL) |
CTRL_SSEC_ALARM_FL_PENDING Value
#define MXC_V_RTC_CTRL_TOD_ALARM_EN_DIS ((uint32_t)0x0UL) |
CTRL_TOD_ALARM_EN_DIS Value
#define MXC_V_RTC_CTRL_TOD_ALARM_EN_EN ((uint32_t)0x1UL) |
CTRL_TOD_ALARM_EN_EN Value
#define MXC_V_RTC_CTRL_TOD_ALARM_FL_INACTIVE ((uint32_t)0x0UL) |
CTRL_TOD_ALARM_FL_INACTIVE Value
#define MXC_V_RTC_CTRL_TOD_ALARM_FL_PENDING ((uint32_t)0x1UL) |
CTRL_TOD_ALARM_FL_PENDING Value
#define MXC_V_RTC_CTRL_WRITE_EN_DIS ((uint32_t)0x0UL) |
CTRL_WRITE_EN_DIS Value
#define MXC_V_RTC_CTRL_WRITE_EN_EN ((uint32_t)0x1UL) |
CTRL_WRITE_EN_EN Value