Register Offsets

Macros
#define	MXC_R_SMON_EXTSCN   ((uint32_t)0x00000000UL)
#define	MXC_R_SMON_INTSCN   ((uint32_t)0x00000004UL)
#define	MXC_R_SMON_SECALM   ((uint32_t)0x00000008UL)
#define	MXC_R_SMON_SECDIAG   ((uint32_t)0x0000000CUL)
#define	MXC_R_SMON_DLRTC   ((uint32_t)0x00000010UL)
#define	MXC_R_SMON_SECST   ((uint32_t)0x00000038UL)

Detailed Description

SMON Peripheral Register Offsets from the SMON Base Peripheral Address.

Macro Definition Documentation

MXC_R_SMON_DLRTC

#define MXC_R_SMON_DLRTC   ((uint32_t)0x00000010UL)

Offset from SMON Base Address: 0x0010

MXC_R_SMON_EXTSCN

#define MXC_R_SMON_EXTSCN   ((uint32_t)0x00000000UL)

Offset from SMON Base Address: 0x0000

MXC_R_SMON_INTSCN

#define MXC_R_SMON_INTSCN   ((uint32_t)0x00000004UL)

Offset from SMON Base Address: 0x0004

MXC_R_SMON_SECALM

#define MXC_R_SMON_SECALM   ((uint32_t)0x00000008UL)

Offset from SMON Base Address: 0x0008

MXC_R_SMON_SECDIAG

#define MXC_R_SMON_SECDIAG   ((uint32_t)0x0000000CUL)

Offset from SMON Base Address: 0x000C

MXC_R_SMON_SECST

#define MXC_R_SMON_SECST   ((uint32_t)0x00000038UL)

Offset from SMON Base Address: 0x0038