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MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
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Register for controlling DMA.
#define MXC_F_SPIXR_DMA_RX_DMA_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_RX_DMA_EN_POS)) |
DMA_RX_DMA_EN Mask
#define MXC_F_SPIXR_DMA_RX_DMA_EN_POS 31 |
DMA_RX_DMA_EN Position
#define MXC_F_SPIXR_DMA_RX_FIFO_CLEAR ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_RX_FIFO_CLEAR_POS)) |
DMA_RX_FIFO_CLEAR Mask
#define MXC_F_SPIXR_DMA_RX_FIFO_CLEAR_POS 23 |
DMA_RX_FIFO_CLEAR Position
#define MXC_F_SPIXR_DMA_RX_FIFO_CNT ((uint32_t)(0x3FUL << MXC_F_SPIXR_DMA_RX_FIFO_CNT_POS)) |
DMA_RX_FIFO_CNT Mask
#define MXC_F_SPIXR_DMA_RX_FIFO_CNT_POS 24 |
DMA_RX_FIFO_CNT Position
#define MXC_F_SPIXR_DMA_RX_FIFO_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_RX_FIFO_EN_POS)) |
DMA_RX_FIFO_EN Mask
#define MXC_F_SPIXR_DMA_RX_FIFO_EN_POS 22 |
DMA_RX_FIFO_EN Position
#define MXC_F_SPIXR_DMA_RX_FIFO_LEVEL ((uint32_t)(0x1FUL << MXC_F_SPIXR_DMA_RX_FIFO_LEVEL_POS)) |
DMA_RX_FIFO_LEVEL Mask
#define MXC_F_SPIXR_DMA_RX_FIFO_LEVEL_POS 16 |
DMA_RX_FIFO_LEVEL Position
#define MXC_F_SPIXR_DMA_TX_DMA_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_TX_DMA_EN_POS)) |
DMA_TX_DMA_EN Mask
#define MXC_F_SPIXR_DMA_TX_DMA_EN_POS 15 |
DMA_TX_DMA_EN Position
#define MXC_F_SPIXR_DMA_TX_FIFO_CLEAR ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_TX_FIFO_CLEAR_POS)) |
DMA_TX_FIFO_CLEAR Mask
#define MXC_F_SPIXR_DMA_TX_FIFO_CLEAR_POS 7 |
DMA_TX_FIFO_CLEAR Position
#define MXC_F_SPIXR_DMA_TX_FIFO_CNT ((uint32_t)(0x3FUL << MXC_F_SPIXR_DMA_TX_FIFO_CNT_POS)) |
DMA_TX_FIFO_CNT Mask
#define MXC_F_SPIXR_DMA_TX_FIFO_CNT_POS 8 |
DMA_TX_FIFO_CNT Position
#define MXC_F_SPIXR_DMA_TX_FIFO_EN ((uint32_t)(0x1UL << MXC_F_SPIXR_DMA_TX_FIFO_EN_POS)) |
DMA_TX_FIFO_EN Mask
#define MXC_F_SPIXR_DMA_TX_FIFO_EN_POS 6 |
DMA_TX_FIFO_EN Position
#define MXC_F_SPIXR_DMA_TX_FIFO_LEVEL ((uint32_t)(0x1FUL << MXC_F_SPIXR_DMA_TX_FIFO_LEVEL_POS)) |
DMA_TX_FIFO_LEVEL Mask
#define MXC_F_SPIXR_DMA_TX_FIFO_LEVEL_POS 0 |
DMA_TX_FIFO_LEVEL Position
#define MXC_S_SPIXR_DMA_RX_DMA_EN_DIS (MXC_V_SPIXR_DMA_RX_DMA_EN_DIS << MXC_F_SPIXR_DMA_RX_DMA_EN_POS) |
DMA_RX_DMA_EN_DIS Setting
#define MXC_S_SPIXR_DMA_RX_DMA_EN_EN (MXC_V_SPIXR_DMA_RX_DMA_EN_EN << MXC_F_SPIXR_DMA_RX_DMA_EN_POS) |
DMA_RX_DMA_EN_EN Setting
#define MXC_S_SPIXR_DMA_RX_FIFO_CLEAR_CLEAR (MXC_V_SPIXR_DMA_RX_FIFO_CLEAR_CLEAR << MXC_F_SPIXR_DMA_RX_FIFO_CLEAR_POS) |
DMA_RX_FIFO_CLEAR_CLEAR Setting
#define MXC_S_SPIXR_DMA_RX_FIFO_EN_DIS (MXC_V_SPIXR_DMA_RX_FIFO_EN_DIS << MXC_F_SPIXR_DMA_RX_FIFO_EN_POS) |
DMA_RX_FIFO_EN_DIS Setting
#define MXC_S_SPIXR_DMA_RX_FIFO_EN_EN (MXC_V_SPIXR_DMA_RX_FIFO_EN_EN << MXC_F_SPIXR_DMA_RX_FIFO_EN_POS) |
DMA_RX_FIFO_EN_EN Setting
#define MXC_S_SPIXR_DMA_TX_DMA_EN_DIS (MXC_V_SPIXR_DMA_TX_DMA_EN_DIS << MXC_F_SPIXR_DMA_TX_DMA_EN_POS) |
DMA_TX_DMA_EN_DIS Setting
#define MXC_S_SPIXR_DMA_TX_DMA_EN_EN (MXC_V_SPIXR_DMA_TX_DMA_EN_EN << MXC_F_SPIXR_DMA_TX_DMA_EN_POS) |
DMA_TX_DMA_EN_EN Setting
#define MXC_S_SPIXR_DMA_TX_FIFO_CLEAR_CLEAR (MXC_V_SPIXR_DMA_TX_FIFO_CLEAR_CLEAR << MXC_F_SPIXR_DMA_TX_FIFO_CLEAR_POS) |
DMA_TX_FIFO_CLEAR_CLEAR Setting
#define MXC_S_SPIXR_DMA_TX_FIFO_EN_DIS (MXC_V_SPIXR_DMA_TX_FIFO_EN_DIS << MXC_F_SPIXR_DMA_TX_FIFO_EN_POS) |
DMA_TX_FIFO_EN_DIS Setting
#define MXC_S_SPIXR_DMA_TX_FIFO_EN_EN (MXC_V_SPIXR_DMA_TX_FIFO_EN_EN << MXC_F_SPIXR_DMA_TX_FIFO_EN_POS) |
DMA_TX_FIFO_EN_EN Setting
#define MXC_V_SPIXR_DMA_RX_DMA_EN_DIS ((uint32_t)0x0UL) |
DMA_RX_DMA_EN_DIS Value
#define MXC_V_SPIXR_DMA_RX_DMA_EN_EN ((uint32_t)0x1UL) |
DMA_RX_DMA_EN_EN Value
#define MXC_V_SPIXR_DMA_RX_FIFO_CLEAR_CLEAR ((uint32_t)0x1UL) |
DMA_RX_FIFO_CLEAR_CLEAR Value
#define MXC_V_SPIXR_DMA_RX_FIFO_EN_DIS ((uint32_t)0x0UL) |
DMA_RX_FIFO_EN_DIS Value
#define MXC_V_SPIXR_DMA_RX_FIFO_EN_EN ((uint32_t)0x1UL) |
DMA_RX_FIFO_EN_EN Value
#define MXC_V_SPIXR_DMA_TX_DMA_EN_DIS ((uint32_t)0x0UL) |
DMA_TX_DMA_EN_DIS Value
#define MXC_V_SPIXR_DMA_TX_DMA_EN_EN ((uint32_t)0x1UL) |
DMA_TX_DMA_EN_EN Value
#define MXC_V_SPIXR_DMA_TX_FIFO_CLEAR_CLEAR ((uint32_t)0x1UL) |
DMA_TX_FIFO_CLEAR_CLEAR Value
#define MXC_V_SPIXR_DMA_TX_FIFO_EN_DIS ((uint32_t)0x0UL) |
DMA_TX_FIFO_EN_DIS Value
#define MXC_V_SPIXR_DMA_TX_FIFO_EN_EN ((uint32_t)0x1UL) |
DMA_TX_FIFO_EN_EN Value