Register Offsets

Macros
#define	MXC_R_SPIXR_DATA32   ((uint32_t)0x00000000UL)
#define	MXC_R_SPIXR_DATA16   ((uint32_t)0x00000000UL)
#define	MXC_R_SPIXR_DATA8   ((uint32_t)0x00000000UL)
#define	MXC_R_SPIXR_CTRL1   ((uint32_t)0x00000004UL)
#define	MXC_R_SPIXR_CTRL2   ((uint32_t)0x00000008UL)
#define	MXC_R_SPIXR_CTRL3   ((uint32_t)0x0000000CUL)
#define	MXC_R_SPIXR_SS_TIME   ((uint32_t)0x00000010UL)
#define	MXC_R_SPIXR_BRG_CTRL   ((uint32_t)0x00000014UL)
#define	MXC_R_SPIXR_DMA   ((uint32_t)0x0000001CUL)
#define	MXC_R_SPIXR_INT_FL   ((uint32_t)0x00000020UL)
#define	MXC_R_SPIXR_INT_EN   ((uint32_t)0x00000024UL)
#define	MXC_R_SPIXR_WAKE_FL   ((uint32_t)0x00000028UL)
#define	MXC_R_SPIXR_WAKE_EN   ((uint32_t)0x0000002CUL)
#define	MXC_R_SPIXR_STAT   ((uint32_t)0x00000030UL)
#define	MXC_R_SPIXR_XMEM_CTRL   ((uint32_t)0x00000034UL)

Detailed Description

SPIXR Peripheral Register Offsets from the SPIXR Base Peripheral Address.

Macro Definition Documentation

MXC_R_SPIXR_BRG_CTRL

#define MXC_R_SPIXR_BRG_CTRL   ((uint32_t)0x00000014UL)

Offset from SPIXR Base Address: 0x0014

MXC_R_SPIXR_CTRL1

#define MXC_R_SPIXR_CTRL1   ((uint32_t)0x00000004UL)

Offset from SPIXR Base Address: 0x0004

MXC_R_SPIXR_CTRL2

#define MXC_R_SPIXR_CTRL2   ((uint32_t)0x00000008UL)

Offset from SPIXR Base Address: 0x0008

MXC_R_SPIXR_CTRL3

#define MXC_R_SPIXR_CTRL3   ((uint32_t)0x0000000CUL)

Offset from SPIXR Base Address: 0x000C

MXC_R_SPIXR_DATA16

#define MXC_R_SPIXR_DATA16   ((uint32_t)0x00000000UL)

Offset from SPIXR Base Address: 0x0000

MXC_R_SPIXR_DATA32

#define MXC_R_SPIXR_DATA32   ((uint32_t)0x00000000UL)

Offset from SPIXR Base Address: 0x0000

MXC_R_SPIXR_DATA8

#define MXC_R_SPIXR_DATA8   ((uint32_t)0x00000000UL)

Offset from SPIXR Base Address: 0x0000

MXC_R_SPIXR_DMA

#define MXC_R_SPIXR_DMA   ((uint32_t)0x0000001CUL)

Offset from SPIXR Base Address: 0x001C

MXC_R_SPIXR_INT_EN

#define MXC_R_SPIXR_INT_EN   ((uint32_t)0x00000024UL)

Offset from SPIXR Base Address: 0x0024

MXC_R_SPIXR_INT_FL

#define MXC_R_SPIXR_INT_FL   ((uint32_t)0x00000020UL)

Offset from SPIXR Base Address: 0x0020

MXC_R_SPIXR_SS_TIME

#define MXC_R_SPIXR_SS_TIME   ((uint32_t)0x00000010UL)

Offset from SPIXR Base Address: 0x0010

MXC_R_SPIXR_STAT

#define MXC_R_SPIXR_STAT   ((uint32_t)0x00000030UL)

Offset from SPIXR Base Address: 0x0030

MXC_R_SPIXR_WAKE_EN

#define MXC_R_SPIXR_WAKE_EN   ((uint32_t)0x0000002CUL)

Offset from SPIXR Base Address: 0x002C

MXC_R_SPIXR_WAKE_FL

#define MXC_R_SPIXR_WAKE_FL   ((uint32_t)0x00000028UL)

Offset from SPIXR Base Address: 0x0028

MXC_R_SPIXR_XMEM_CTRL

#define MXC_R_SPIXR_XMEM_CTRL   ((uint32_t)0x00000034UL)

Offset from SPIXR Base Address: 0x0034