![]() |
MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
|
Control Register.
#define MXC_F_UART_CTRL0_BITACC ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_BITACC_POS)) |
CTRL0_BITACC Mask
#define MXC_F_UART_CTRL0_BITACC_POS 7 |
CTRL0_BITACC Position
#define MXC_F_UART_CTRL0_BREAK ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_BREAK_POS)) |
CTRL0_BREAK Mask
#define MXC_F_UART_CTRL0_BREAK_POS 14 |
CTRL0_BREAK Position
#define MXC_F_UART_CTRL0_CLK_SEL ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_CLK_SEL_POS)) |
CTRL0_CLK_SEL Mask
#define MXC_F_UART_CTRL0_CLK_SEL_POS 15 |
CTRL0_CLK_SEL Position
#define MXC_F_UART_CTRL0_ENABLE ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_ENABLE_POS)) |
CTRL0_ENABLE Mask
#define MXC_F_UART_CTRL0_ENABLE_POS 0 |
CTRL0_ENABLE Position
#define MXC_F_UART_CTRL0_FLOW ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_FLOW_POS)) |
CTRL0_FLOW Mask
#define MXC_F_UART_CTRL0_FLOW_POS 11 |
CTRL0_FLOW Position
#define MXC_F_UART_CTRL0_FLOWPOL ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_FLOWPOL_POS)) |
CTRL0_FLOWPOL Mask
#define MXC_F_UART_CTRL0_FLOWPOL_POS 12 |
CTRL0_FLOWPOL Position
#define MXC_F_UART_CTRL0_NULLMOD ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_NULLMOD_POS)) |
CTRL0_NULLMOD Mask
#define MXC_F_UART_CTRL0_NULLMOD_POS 13 |
CTRL0_NULLMOD Position
#define MXC_F_UART_CTRL0_PARITY_EN ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_PARITY_EN_POS)) |
CTRL0_PARITY_EN Mask
#define MXC_F_UART_CTRL0_PARITY_EN_POS 1 |
CTRL0_PARITY_EN Position
#define MXC_F_UART_CTRL0_PARITY_LVL ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_PARITY_LVL_POS)) |
CTRL0_PARITY_LVL Mask
#define MXC_F_UART_CTRL0_PARITY_LVL_POS 4 |
CTRL0_PARITY_LVL Position
#define MXC_F_UART_CTRL0_PARITY_MODE ((uint32_t)(0x3UL << MXC_F_UART_CTRL0_PARITY_MODE_POS)) |
CTRL0_PARITY_MODE Mask
#define MXC_F_UART_CTRL0_PARITY_MODE_POS 2 |
CTRL0_PARITY_MODE Position
#define MXC_F_UART_CTRL0_RXFLUSH ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_RXFLUSH_POS)) |
CTRL0_RXFLUSH Mask
#define MXC_F_UART_CTRL0_RXFLUSH_POS 6 |
CTRL0_RXFLUSH Position
#define MXC_F_UART_CTRL0_SIZE ((uint32_t)(0x3UL << MXC_F_UART_CTRL0_SIZE_POS)) |
CTRL0_SIZE Mask
#define MXC_F_UART_CTRL0_SIZE_POS 8 |
CTRL0_SIZE Position
#define MXC_F_UART_CTRL0_STOP ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_STOP_POS)) |
CTRL0_STOP Mask
#define MXC_F_UART_CTRL0_STOP_POS 10 |
CTRL0_STOP Position
#define MXC_F_UART_CTRL0_TO_CNT ((uint32_t)(0xFFUL << MXC_F_UART_CTRL0_TO_CNT_POS)) |
CTRL0_TO_CNT Mask
#define MXC_F_UART_CTRL0_TO_CNT_POS 16 |
CTRL0_TO_CNT Position
#define MXC_F_UART_CTRL0_TXFLUSH ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_TXFLUSH_POS)) |
CTRL0_TXFLUSH Mask
#define MXC_F_UART_CTRL0_TXFLUSH_POS 5 |
CTRL0_TXFLUSH Position
#define MXC_S_UART_CTRL0_BITACC_BIT (MXC_V_UART_CTRL0_BITACC_BIT << MXC_F_UART_CTRL0_BITACC_POS) |
CTRL0_BITACC_BIT Setting
#define MXC_S_UART_CTRL0_BITACC_FRAME (MXC_V_UART_CTRL0_BITACC_FRAME << MXC_F_UART_CTRL0_BITACC_POS) |
CTRL0_BITACC_FRAME Setting
#define MXC_S_UART_CTRL0_BREAK_BREAK (MXC_V_UART_CTRL0_BREAK_BREAK << MXC_F_UART_CTRL0_BREAK_POS) |
CTRL0_BREAK_BREAK Setting
#define MXC_S_UART_CTRL0_BREAK_NORMAL (MXC_V_UART_CTRL0_BREAK_NORMAL << MXC_F_UART_CTRL0_BREAK_POS) |
CTRL0_BREAK_NORMAL Setting
#define MXC_S_UART_CTRL0_CLK_SEL_ALT_CLK (MXC_V_UART_CTRL0_CLK_SEL_ALT_CLK << MXC_F_UART_CTRL0_CLK_SEL_POS) |
CTRL0_CLK_SEL_ALT_CLK Setting
#define MXC_S_UART_CTRL0_CLK_SEL_PERIPH_CLK (MXC_V_UART_CTRL0_CLK_SEL_PERIPH_CLK << MXC_F_UART_CTRL0_CLK_SEL_POS) |
CTRL0_CLK_SEL_PERIPH_CLK Setting
#define MXC_S_UART_CTRL0_ENABLE_DIS (MXC_V_UART_CTRL0_ENABLE_DIS << MXC_F_UART_CTRL0_ENABLE_POS) |
CTRL0_ENABLE_DIS Setting
#define MXC_S_UART_CTRL0_ENABLE_EN (MXC_V_UART_CTRL0_ENABLE_EN << MXC_F_UART_CTRL0_ENABLE_POS) |
CTRL0_ENABLE_EN Setting
#define MXC_S_UART_CTRL0_FLOW_DIS (MXC_V_UART_CTRL0_FLOW_DIS << MXC_F_UART_CTRL0_FLOW_POS) |
CTRL0_FLOW_DIS Setting
#define MXC_S_UART_CTRL0_FLOW_EN (MXC_V_UART_CTRL0_FLOW_EN << MXC_F_UART_CTRL0_FLOW_POS) |
CTRL0_FLOW_EN Setting
#define MXC_S_UART_CTRL0_FLOWPOL_ACTIVE_HIGH (MXC_V_UART_CTRL0_FLOWPOL_ACTIVE_HIGH << MXC_F_UART_CTRL0_FLOWPOL_POS) |
CTRL0_FLOWPOL_ACTIVE_HIGH Setting
#define MXC_S_UART_CTRL0_FLOWPOL_ACTIVE_LOW (MXC_V_UART_CTRL0_FLOWPOL_ACTIVE_LOW << MXC_F_UART_CTRL0_FLOWPOL_POS) |
CTRL0_FLOWPOL_ACTIVE_LOW Setting
#define MXC_S_UART_CTRL0_NULLMOD_NORMAL (MXC_V_UART_CTRL0_NULLMOD_NORMAL << MXC_F_UART_CTRL0_NULLMOD_POS) |
CTRL0_NULLMOD_NORMAL Setting
#define MXC_S_UART_CTRL0_NULLMOD_SWAPPED (MXC_V_UART_CTRL0_NULLMOD_SWAPPED << MXC_F_UART_CTRL0_NULLMOD_POS) |
CTRL0_NULLMOD_SWAPPED Setting
#define MXC_S_UART_CTRL0_PARITY_EN_DIS (MXC_V_UART_CTRL0_PARITY_EN_DIS << MXC_F_UART_CTRL0_PARITY_EN_POS) |
CTRL0_PARITY_EN_DIS Setting
#define MXC_S_UART_CTRL0_PARITY_EN_EN (MXC_V_UART_CTRL0_PARITY_EN_EN << MXC_F_UART_CTRL0_PARITY_EN_POS) |
CTRL0_PARITY_EN_EN Setting
#define MXC_S_UART_CTRL0_PARITY_LVL_ONE (MXC_V_UART_CTRL0_PARITY_LVL_ONE << MXC_F_UART_CTRL0_PARITY_LVL_POS) |
CTRL0_PARITY_LVL_ONE Setting
#define MXC_S_UART_CTRL0_PARITY_LVL_ZERO (MXC_V_UART_CTRL0_PARITY_LVL_ZERO << MXC_F_UART_CTRL0_PARITY_LVL_POS) |
CTRL0_PARITY_LVL_ZERO Setting
#define MXC_S_UART_CTRL0_PARITY_MODE_EVEN (MXC_V_UART_CTRL0_PARITY_MODE_EVEN << MXC_F_UART_CTRL0_PARITY_MODE_POS) |
CTRL0_PARITY_MODE_EVEN Setting
#define MXC_S_UART_CTRL0_PARITY_MODE_MARK (MXC_V_UART_CTRL0_PARITY_MODE_MARK << MXC_F_UART_CTRL0_PARITY_MODE_POS) |
CTRL0_PARITY_MODE_MARK Setting
#define MXC_S_UART_CTRL0_PARITY_MODE_ODD (MXC_V_UART_CTRL0_PARITY_MODE_ODD << MXC_F_UART_CTRL0_PARITY_MODE_POS) |
CTRL0_PARITY_MODE_ODD Setting
#define MXC_S_UART_CTRL0_PARITY_MODE_SPACE (MXC_V_UART_CTRL0_PARITY_MODE_SPACE << MXC_F_UART_CTRL0_PARITY_MODE_POS) |
CTRL0_PARITY_MODE_SPACE Setting
#define MXC_S_UART_CTRL0_RXFLUSH_FLUSH (MXC_V_UART_CTRL0_RXFLUSH_FLUSH << MXC_F_UART_CTRL0_RXFLUSH_POS) |
CTRL0_RXFLUSH_FLUSH Setting
#define MXC_S_UART_CTRL0_RXFLUSH_NOP (MXC_V_UART_CTRL0_RXFLUSH_NOP << MXC_F_UART_CTRL0_RXFLUSH_POS) |
CTRL0_RXFLUSH_NOP Setting
#define MXC_S_UART_CTRL0_SIZE_5BIT_DATA (MXC_V_UART_CTRL0_SIZE_5BIT_DATA << MXC_F_UART_CTRL0_SIZE_POS) |
CTRL0_SIZE_5BIT_DATA Setting
#define MXC_S_UART_CTRL0_SIZE_6BIT_DATA (MXC_V_UART_CTRL0_SIZE_6BIT_DATA << MXC_F_UART_CTRL0_SIZE_POS) |
CTRL0_SIZE_6BIT_DATA Setting
#define MXC_S_UART_CTRL0_SIZE_7BIT_DATA (MXC_V_UART_CTRL0_SIZE_7BIT_DATA << MXC_F_UART_CTRL0_SIZE_POS) |
CTRL0_SIZE_7BIT_DATA Setting
#define MXC_S_UART_CTRL0_SIZE_8BIT_DATA (MXC_V_UART_CTRL0_SIZE_8BIT_DATA << MXC_F_UART_CTRL0_SIZE_POS) |
CTRL0_SIZE_8BIT_DATA Setting
#define MXC_S_UART_CTRL0_STOP_1_STOPBITS (MXC_V_UART_CTRL0_STOP_1_STOPBITS << MXC_F_UART_CTRL0_STOP_POS) |
CTRL0_STOP_1_STOPBITS Setting
#define MXC_S_UART_CTRL0_STOP_2_STOPBITS (MXC_V_UART_CTRL0_STOP_2_STOPBITS << MXC_F_UART_CTRL0_STOP_POS) |
CTRL0_STOP_2_STOPBITS Setting
#define MXC_S_UART_CTRL0_TXFLUSH_FLUSH (MXC_V_UART_CTRL0_TXFLUSH_FLUSH << MXC_F_UART_CTRL0_TXFLUSH_POS) |
CTRL0_TXFLUSH_FLUSH Setting
#define MXC_S_UART_CTRL0_TXFLUSH_NOP (MXC_V_UART_CTRL0_TXFLUSH_NOP << MXC_F_UART_CTRL0_TXFLUSH_POS) |
CTRL0_TXFLUSH_NOP Setting
#define MXC_V_UART_CTRL0_BITACC_BIT ((uint32_t)0x1UL) |
CTRL0_BITACC_BIT Value
#define MXC_V_UART_CTRL0_BITACC_FRAME ((uint32_t)0x0UL) |
CTRL0_BITACC_FRAME Value
#define MXC_V_UART_CTRL0_BREAK_BREAK ((uint32_t)0x1UL) |
CTRL0_BREAK_BREAK Value
#define MXC_V_UART_CTRL0_BREAK_NORMAL ((uint32_t)0x0UL) |
CTRL0_BREAK_NORMAL Value
#define MXC_V_UART_CTRL0_CLK_SEL_ALT_CLK ((uint32_t)0x1UL) |
CTRL0_CLK_SEL_ALT_CLK Value
#define MXC_V_UART_CTRL0_CLK_SEL_PERIPH_CLK ((uint32_t)0x0UL) |
CTRL0_CLK_SEL_PERIPH_CLK Value
#define MXC_V_UART_CTRL0_ENABLE_DIS ((uint32_t)0x0UL) |
CTRL0_ENABLE_DIS Value
#define MXC_V_UART_CTRL0_ENABLE_EN ((uint32_t)0x1UL) |
CTRL0_ENABLE_EN Value
#define MXC_V_UART_CTRL0_FLOW_DIS ((uint32_t)0x0UL) |
CTRL0_FLOW_DIS Value
#define MXC_V_UART_CTRL0_FLOW_EN ((uint32_t)0x1UL) |
CTRL0_FLOW_EN Value
#define MXC_V_UART_CTRL0_FLOWPOL_ACTIVE_HIGH ((uint32_t)0x1UL) |
CTRL0_FLOWPOL_ACTIVE_HIGH Value
#define MXC_V_UART_CTRL0_FLOWPOL_ACTIVE_LOW ((uint32_t)0x0UL) |
CTRL0_FLOWPOL_ACTIVE_LOW Value
#define MXC_V_UART_CTRL0_NULLMOD_NORMAL ((uint32_t)0x0UL) |
CTRL0_NULLMOD_NORMAL Value
#define MXC_V_UART_CTRL0_NULLMOD_SWAPPED ((uint32_t)0x1UL) |
CTRL0_NULLMOD_SWAPPED Value
#define MXC_V_UART_CTRL0_PARITY_EN_DIS ((uint32_t)0x0UL) |
CTRL0_PARITY_EN_DIS Value
#define MXC_V_UART_CTRL0_PARITY_EN_EN ((uint32_t)0x1UL) |
CTRL0_PARITY_EN_EN Value
#define MXC_V_UART_CTRL0_PARITY_LVL_ONE ((uint32_t)0x1UL) |
CTRL0_PARITY_LVL_ONE Value
#define MXC_V_UART_CTRL0_PARITY_LVL_ZERO ((uint32_t)0x0UL) |
CTRL0_PARITY_LVL_ZERO Value
#define MXC_V_UART_CTRL0_PARITY_MODE_EVEN ((uint32_t)0x0UL) |
CTRL0_PARITY_MODE_EVEN Value
#define MXC_V_UART_CTRL0_PARITY_MODE_MARK ((uint32_t)0x2UL) |
CTRL0_PARITY_MODE_MARK Value
#define MXC_V_UART_CTRL0_PARITY_MODE_ODD ((uint32_t)0x1UL) |
CTRL0_PARITY_MODE_ODD Value
#define MXC_V_UART_CTRL0_PARITY_MODE_SPACE ((uint32_t)0x3UL) |
CTRL0_PARITY_MODE_SPACE Value
#define MXC_V_UART_CTRL0_RXFLUSH_FLUSH ((uint32_t)0x1UL) |
CTRL0_RXFLUSH_FLUSH Value
#define MXC_V_UART_CTRL0_RXFLUSH_NOP ((uint32_t)0x0UL) |
CTRL0_RXFLUSH_NOP Value
#define MXC_V_UART_CTRL0_SIZE_5BIT_DATA ((uint32_t)0x0UL) |
CTRL0_SIZE_5BIT_DATA Value
#define MXC_V_UART_CTRL0_SIZE_6BIT_DATA ((uint32_t)0x1UL) |
CTRL0_SIZE_6BIT_DATA Value
#define MXC_V_UART_CTRL0_SIZE_7BIT_DATA ((uint32_t)0x2UL) |
CTRL0_SIZE_7BIT_DATA Value
#define MXC_V_UART_CTRL0_SIZE_8BIT_DATA ((uint32_t)0x3UL) |
CTRL0_SIZE_8BIT_DATA Value
#define MXC_V_UART_CTRL0_STOP_1_STOPBITS ((uint32_t)0x0UL) |
CTRL0_STOP_1_STOPBITS Value
#define MXC_V_UART_CTRL0_STOP_2_STOPBITS ((uint32_t)0x1UL) |
CTRL0_STOP_2_STOPBITS Value
#define MXC_V_UART_CTRL0_TXFLUSH_FLUSH ((uint32_t)0x1UL) |
CTRL0_TXFLUSH_FLUSH Value
#define MXC_V_UART_CTRL0_TXFLUSH_NOP ((uint32_t)0x0UL) |
CTRL0_TXFLUSH_NOP Value