UART_CTRL1

Macros
#define	MXC_F_UART_CTRL1_RX_FIFO_LVL_POS   0
#define	MXC_F_UART_CTRL1_RX_FIFO_LVL   ((uint32_t)(0x3FUL << MXC_F_UART_CTRL1_RX_FIFO_LVL_POS))
#define	MXC_F_UART_CTRL1_TX_FIFO_LVL_POS   8
#define	MXC_F_UART_CTRL1_TX_FIFO_LVL   ((uint32_t)(0x3FUL << MXC_F_UART_CTRL1_TX_FIFO_LVL_POS))
#define	MXC_F_UART_CTRL1_RTS_FIFO_LVL_POS   16
#define	MXC_F_UART_CTRL1_RTS_FIFO_LVL   ((uint32_t)(0x3FUL << MXC_F_UART_CTRL1_RTS_FIFO_LVL_POS))

Detailed Description

Threshold Control register.

Macro Definition Documentation

MXC_F_UART_CTRL1_RTS_FIFO_LVL

#define MXC_F_UART_CTRL1_RTS_FIFO_LVL   ((uint32_t)(0x3FUL << MXC_F_UART_CTRL1_RTS_FIFO_LVL_POS))

CTRL1_RTS_FIFO_LVL Mask

MXC_F_UART_CTRL1_RTS_FIFO_LVL_POS

#define MXC_F_UART_CTRL1_RTS_FIFO_LVL_POS   16

CTRL1_RTS_FIFO_LVL Position

MXC_F_UART_CTRL1_RX_FIFO_LVL

#define MXC_F_UART_CTRL1_RX_FIFO_LVL   ((uint32_t)(0x3FUL << MXC_F_UART_CTRL1_RX_FIFO_LVL_POS))

CTRL1_RX_FIFO_LVL Mask

MXC_F_UART_CTRL1_RX_FIFO_LVL_POS

#define MXC_F_UART_CTRL1_RX_FIFO_LVL_POS   0

CTRL1_RX_FIFO_LVL Position

MXC_F_UART_CTRL1_TX_FIFO_LVL

#define MXC_F_UART_CTRL1_TX_FIFO_LVL   ((uint32_t)(0x3FUL << MXC_F_UART_CTRL1_TX_FIFO_LVL_POS))

CTRL1_TX_FIFO_LVL Mask

MXC_F_UART_CTRL1_TX_FIFO_LVL_POS

#define MXC_F_UART_CTRL1_TX_FIFO_LVL_POS   8

CTRL1_TX_FIFO_LVL Position