Documentation/MAX32650/smon__regs_8h_source.html

/******************************************************************************

 *

 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by

 * Analog Devices, Inc.),

 * Copyright (C) 2023-2024 Analog Devices, Inc.

 *

 * Licensed under the Apache License, Version 2.0 (the "License");

 * you may not use this file except in compliance with the License.

 * You may obtain a copy of the License at

 *

 *     http://www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an "AS IS" BASIS,

 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 *

 ******************************************************************************/


#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_SMON_REGS_H_

#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_SMON_REGS_H_


/* **** Includes **** */

#include <stdint.h>


#ifdef __cplusplus

extern "C" {

#endif


#if defined (__ICCARM__)

  #pragma system_include

#endif


#if defined (__CC_ARM)

  #pragma anon_unions

#endif

/*

    If types are not defined elsewhere (CMSIS) define them here

*/

#ifndef __IO

#define __IO volatile

#endif

#ifndef __I

#define __I  volatile const

#endif

#ifndef __O

#define __O  volatile

#endif

#ifndef __R

#define __R  volatile const

#endif


/* **** Definitions **** */


typedef struct {

    __IO uint32_t extscn;

    __IO uint32_t intscn;

    __IO uint32_t secalm;

    __I  uint32_t secdiag;

    __I  uint32_t dlrtc;

    __R  uint32_t rsv_0x14_0x37[9];

    __IO uint32_t secst;

} mxc_smon_regs_t;


/* Register offsets for module SMON */

#define MXC_R_SMON_EXTSCN                  ((uint32_t)0x00000000UL)

#define MXC_R_SMON_INTSCN                  ((uint32_t)0x00000004UL)

#define MXC_R_SMON_SECALM                  ((uint32_t)0x00000008UL)

#define MXC_R_SMON_SECDIAG                 ((uint32_t)0x0000000CUL)

#define MXC_R_SMON_DLRTC                   ((uint32_t)0x00000010UL)

#define MXC_R_SMON_SECST                   ((uint32_t)0x00000038UL)

#define MXC_F_SMON_EXTSCN_EXTS_EN0_POS                 0

#define MXC_F_SMON_EXTSCN_EXTS_EN0                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN0_POS))

#define MXC_V_SMON_EXTSCN_EXTS_EN0_DIS                 ((uint32_t)0x0UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN0_DIS                 (MXC_V_SMON_EXTSCN_EXTS_EN0_DIS << MXC_F_SMON_EXTSCN_EXTS_EN0_POS)

#define MXC_V_SMON_EXTSCN_EXTS_EN0_EN                  ((uint32_t)0x1UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN0_EN                  (MXC_V_SMON_EXTSCN_EXTS_EN0_EN << MXC_F_SMON_EXTSCN_EXTS_EN0_POS)

#define MXC_F_SMON_EXTSCN_EXTS_EN1_POS                 1

#define MXC_F_SMON_EXTSCN_EXTS_EN1                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN1_POS))

#define MXC_V_SMON_EXTSCN_EXTS_EN1_DIS                 ((uint32_t)0x0UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN1_DIS                 (MXC_V_SMON_EXTSCN_EXTS_EN1_DIS << MXC_F_SMON_EXTSCN_EXTS_EN1_POS)

#define MXC_V_SMON_EXTSCN_EXTS_EN1_EN                  ((uint32_t)0x1UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN1_EN                  (MXC_V_SMON_EXTSCN_EXTS_EN1_EN << MXC_F_SMON_EXTSCN_EXTS_EN1_POS)

#define MXC_F_SMON_EXTSCN_EXTS_EN2_POS                 2

#define MXC_F_SMON_EXTSCN_EXTS_EN2                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN2_POS))

#define MXC_V_SMON_EXTSCN_EXTS_EN2_DIS                 ((uint32_t)0x0UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN2_DIS                 (MXC_V_SMON_EXTSCN_EXTS_EN2_DIS << MXC_F_SMON_EXTSCN_EXTS_EN2_POS)

#define MXC_V_SMON_EXTSCN_EXTS_EN2_EN                  ((uint32_t)0x1UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN2_EN                  (MXC_V_SMON_EXTSCN_EXTS_EN2_EN << MXC_F_SMON_EXTSCN_EXTS_EN2_POS)

#define MXC_F_SMON_EXTSCN_EXTS_EN3_POS                 3

#define MXC_F_SMON_EXTSCN_EXTS_EN3                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN3_POS))

#define MXC_V_SMON_EXTSCN_EXTS_EN3_DIS                 ((uint32_t)0x0UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN3_DIS                 (MXC_V_SMON_EXTSCN_EXTS_EN3_DIS << MXC_F_SMON_EXTSCN_EXTS_EN3_POS)

#define MXC_V_SMON_EXTSCN_EXTS_EN3_EN                  ((uint32_t)0x1UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN3_EN                  (MXC_V_SMON_EXTSCN_EXTS_EN3_EN << MXC_F_SMON_EXTSCN_EXTS_EN3_POS)

#define MXC_F_SMON_EXTSCN_EXTS_EN4_POS                 4

#define MXC_F_SMON_EXTSCN_EXTS_EN4                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN4_POS))

#define MXC_V_SMON_EXTSCN_EXTS_EN4_DIS                 ((uint32_t)0x0UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN4_DIS                 (MXC_V_SMON_EXTSCN_EXTS_EN4_DIS << MXC_F_SMON_EXTSCN_EXTS_EN4_POS)

#define MXC_V_SMON_EXTSCN_EXTS_EN4_EN                  ((uint32_t)0x1UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN4_EN                  (MXC_V_SMON_EXTSCN_EXTS_EN4_EN << MXC_F_SMON_EXTSCN_EXTS_EN4_POS)

#define MXC_F_SMON_EXTSCN_EXTS_EN5_POS                 5

#define MXC_F_SMON_EXTSCN_EXTS_EN5                     ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN5_POS))

#define MXC_V_SMON_EXTSCN_EXTS_EN5_DIS                 ((uint32_t)0x0UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN5_DIS                 (MXC_V_SMON_EXTSCN_EXTS_EN5_DIS << MXC_F_SMON_EXTSCN_EXTS_EN5_POS)

#define MXC_V_SMON_EXTSCN_EXTS_EN5_EN                  ((uint32_t)0x1UL)

#define MXC_S_SMON_EXTSCN_EXTS_EN5_EN                  (MXC_V_SMON_EXTSCN_EXTS_EN5_EN << MXC_F_SMON_EXTSCN_EXTS_EN5_POS)

#define MXC_F_SMON_EXTSCN_EXTCNT_POS                   16

#define MXC_F_SMON_EXTSCN_EXTCNT                       ((uint32_t)(0x1FUL << MXC_F_SMON_EXTSCN_EXTCNT_POS))

#define MXC_F_SMON_EXTSCN_EXTFRQ_POS                   21

#define MXC_F_SMON_EXTSCN_EXTFRQ                       ((uint32_t)(0x7UL << MXC_F_SMON_EXTSCN_EXTFRQ_POS))

#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ2000HZ            ((uint32_t)0x0UL)

#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ2000HZ            (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ2000HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)

#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ1000HZ            ((uint32_t)0x1UL)

#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ1000HZ            (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ1000HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)

#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ500HZ             ((uint32_t)0x2UL)

#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ500HZ             (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ500HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)

#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ250HZ             ((uint32_t)0x3UL)

#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ250HZ             (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ250HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)

#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ125HZ             ((uint32_t)0x4UL)

#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ125HZ             (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ125HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)

#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ63HZ              ((uint32_t)0x5UL)

#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ63HZ              (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ63HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)

#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ31HZ              ((uint32_t)0x6UL)

#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ31HZ              (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ31HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)

#define MXC_V_SMON_EXTSCN_EXTFRQ_RFU                   ((uint32_t)0x7UL)

#define MXC_S_SMON_EXTSCN_EXTFRQ_RFU                   (MXC_V_SMON_EXTSCN_EXTFRQ_RFU << MXC_F_SMON_EXTSCN_EXTFRQ_POS)

#define MXC_F_SMON_EXTSCN_DIVCLK_POS                   24

#define MXC_F_SMON_EXTSCN_DIVCLK                       ((uint32_t)(0x7UL << MXC_F_SMON_EXTSCN_DIVCLK_POS))

#define MXC_V_SMON_EXTSCN_DIVCLK_DIV1                  ((uint32_t)0x0UL)

#define MXC_S_SMON_EXTSCN_DIVCLK_DIV1                  (MXC_V_SMON_EXTSCN_DIVCLK_DIV1 << MXC_F_SMON_EXTSCN_DIVCLK_POS)

#define MXC_V_SMON_EXTSCN_DIVCLK_DIV2                  ((uint32_t)0x1UL)

#define MXC_S_SMON_EXTSCN_DIVCLK_DIV2                  (MXC_V_SMON_EXTSCN_DIVCLK_DIV2 << MXC_F_SMON_EXTSCN_DIVCLK_POS)

#define MXC_V_SMON_EXTSCN_DIVCLK_DIV4                  ((uint32_t)0x2UL)

#define MXC_S_SMON_EXTSCN_DIVCLK_DIV4                  (MXC_V_SMON_EXTSCN_DIVCLK_DIV4 << MXC_F_SMON_EXTSCN_DIVCLK_POS)

#define MXC_V_SMON_EXTSCN_DIVCLK_DIV8                  ((uint32_t)0x3UL)

#define MXC_S_SMON_EXTSCN_DIVCLK_DIV8                  (MXC_V_SMON_EXTSCN_DIVCLK_DIV8 << MXC_F_SMON_EXTSCN_DIVCLK_POS)

#define MXC_V_SMON_EXTSCN_DIVCLK_DIV16                 ((uint32_t)0x4UL)

#define MXC_S_SMON_EXTSCN_DIVCLK_DIV16                 (MXC_V_SMON_EXTSCN_DIVCLK_DIV16 << MXC_F_SMON_EXTSCN_DIVCLK_POS)

#define MXC_V_SMON_EXTSCN_DIVCLK_DIV32                 ((uint32_t)0x5UL)

#define MXC_S_SMON_EXTSCN_DIVCLK_DIV32                 (MXC_V_SMON_EXTSCN_DIVCLK_DIV32 << MXC_F_SMON_EXTSCN_DIVCLK_POS)

#define MXC_V_SMON_EXTSCN_DIVCLK_DIV64                 ((uint32_t)0x6UL)

#define MXC_S_SMON_EXTSCN_DIVCLK_DIV64                 (MXC_V_SMON_EXTSCN_DIVCLK_DIV64 << MXC_F_SMON_EXTSCN_DIVCLK_POS)

#define MXC_F_SMON_EXTSCN_BUSY_POS                     30

#define MXC_F_SMON_EXTSCN_BUSY                         ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_BUSY_POS))

#define MXC_V_SMON_EXTSCN_BUSY_IDLE                    ((uint32_t)0x0UL)

#define MXC_S_SMON_EXTSCN_BUSY_IDLE                    (MXC_V_SMON_EXTSCN_BUSY_IDLE << MXC_F_SMON_EXTSCN_BUSY_POS)

#define MXC_V_SMON_EXTSCN_BUSY_BUSY                    ((uint32_t)0x1UL)

#define MXC_S_SMON_EXTSCN_BUSY_BUSY                    (MXC_V_SMON_EXTSCN_BUSY_BUSY << MXC_F_SMON_EXTSCN_BUSY_POS)

#define MXC_F_SMON_EXTSCN_LOCK_POS                     31

#define MXC_F_SMON_EXTSCN_LOCK                         ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_LOCK_POS))

#define MXC_V_SMON_EXTSCN_LOCK_UNLOCKED                ((uint32_t)0x0UL)

#define MXC_S_SMON_EXTSCN_LOCK_UNLOCKED                (MXC_V_SMON_EXTSCN_LOCK_UNLOCKED << MXC_F_SMON_EXTSCN_LOCK_POS)

#define MXC_V_SMON_EXTSCN_LOCK_LOCKED                  ((uint32_t)0x1UL)

#define MXC_S_SMON_EXTSCN_LOCK_LOCKED                  (MXC_V_SMON_EXTSCN_LOCK_LOCKED << MXC_F_SMON_EXTSCN_LOCK_POS)

#define MXC_F_SMON_INTSCN_SHIELD_EN_POS                0

#define MXC_F_SMON_INTSCN_SHIELD_EN                    ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_SHIELD_EN_POS))

#define MXC_V_SMON_INTSCN_SHIELD_EN_DIS                ((uint32_t)0x0UL)

#define MXC_S_SMON_INTSCN_SHIELD_EN_DIS                (MXC_V_SMON_INTSCN_SHIELD_EN_DIS << MXC_F_SMON_INTSCN_SHIELD_EN_POS)

#define MXC_V_SMON_INTSCN_SHIELD_EN_EN                 ((uint32_t)0x1UL)

#define MXC_S_SMON_INTSCN_SHIELD_EN_EN                 (MXC_V_SMON_INTSCN_SHIELD_EN_EN << MXC_F_SMON_INTSCN_SHIELD_EN_POS)

#define MXC_F_SMON_INTSCN_TEMP_EN_POS                  1

#define MXC_F_SMON_INTSCN_TEMP_EN                      ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_TEMP_EN_POS))

#define MXC_V_SMON_INTSCN_TEMP_EN_DIS                  ((uint32_t)0x0UL)

#define MXC_S_SMON_INTSCN_TEMP_EN_DIS                  (MXC_V_SMON_INTSCN_TEMP_EN_DIS << MXC_F_SMON_INTSCN_TEMP_EN_POS)

#define MXC_V_SMON_INTSCN_TEMP_EN_EN                   ((uint32_t)0x1UL)

#define MXC_S_SMON_INTSCN_TEMP_EN_EN                   (MXC_V_SMON_INTSCN_TEMP_EN_EN << MXC_F_SMON_INTSCN_TEMP_EN_POS)

#define MXC_F_SMON_INTSCN_VBAT_EN_POS                  2

#define MXC_F_SMON_INTSCN_VBAT_EN                      ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VBAT_EN_POS))

#define MXC_V_SMON_INTSCN_VBAT_EN_DIS                  ((uint32_t)0x0UL)

#define MXC_S_SMON_INTSCN_VBAT_EN_DIS                  (MXC_V_SMON_INTSCN_VBAT_EN_DIS << MXC_F_SMON_INTSCN_VBAT_EN_POS)

#define MXC_V_SMON_INTSCN_VBAT_EN_EN                   ((uint32_t)0x1UL)

#define MXC_S_SMON_INTSCN_VBAT_EN_EN                   (MXC_V_SMON_INTSCN_VBAT_EN_EN << MXC_F_SMON_INTSCN_VBAT_EN_POS)

#define MXC_F_SMON_INTSCN_LOTEMP_SEL_POS               16

#define MXC_F_SMON_INTSCN_LOTEMP_SEL                   ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_LOTEMP_SEL_POS))

#define MXC_V_SMON_INTSCN_LOTEMP_SEL_NEG50C            ((uint32_t)0x0UL)

#define MXC_S_SMON_INTSCN_LOTEMP_SEL_NEG50C            (MXC_V_SMON_INTSCN_LOTEMP_SEL_NEG50C << MXC_F_SMON_INTSCN_LOTEMP_SEL_POS)

#define MXC_V_SMON_INTSCN_LOTEMP_SEL_NEG30C            ((uint32_t)0x1UL)

#define MXC_S_SMON_INTSCN_LOTEMP_SEL_NEG30C            (MXC_V_SMON_INTSCN_LOTEMP_SEL_NEG30C << MXC_F_SMON_INTSCN_LOTEMP_SEL_POS)

#define MXC_F_SMON_INTSCN_VCORELOEN_POS                18

#define MXC_F_SMON_INTSCN_VCORELOEN                    ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VCORELOEN_POS))

#define MXC_V_SMON_INTSCN_VCORELOEN_DIS                ((uint32_t)0x0UL)

#define MXC_S_SMON_INTSCN_VCORELOEN_DIS                (MXC_V_SMON_INTSCN_VCORELOEN_DIS << MXC_F_SMON_INTSCN_VCORELOEN_POS)

#define MXC_V_SMON_INTSCN_VCORELOEN_EN                 ((uint32_t)0x1UL)

#define MXC_S_SMON_INTSCN_VCORELOEN_EN                 (MXC_V_SMON_INTSCN_VCORELOEN_EN << MXC_F_SMON_INTSCN_VCORELOEN_POS)

#define MXC_F_SMON_INTSCN_VCOREHIEN_POS                19

#define MXC_F_SMON_INTSCN_VCOREHIEN                    ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VCOREHIEN_POS))

#define MXC_V_SMON_INTSCN_VCOREHIEN_DIS                ((uint32_t)0x0UL)

#define MXC_S_SMON_INTSCN_VCOREHIEN_DIS                (MXC_V_SMON_INTSCN_VCOREHIEN_DIS << MXC_F_SMON_INTSCN_VCOREHIEN_POS)

#define MXC_V_SMON_INTSCN_VCOREHIEN_EN                 ((uint32_t)0x1UL)

#define MXC_S_SMON_INTSCN_VCOREHIEN_EN                 (MXC_V_SMON_INTSCN_VCOREHIEN_EN << MXC_F_SMON_INTSCN_VCOREHIEN_POS)

#define MXC_F_SMON_INTSCN_VDDLOEN_POS                  20

#define MXC_F_SMON_INTSCN_VDDLOEN                      ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VDDLOEN_POS))

#define MXC_V_SMON_INTSCN_VDDLOEN_DIS                  ((uint32_t)0x0UL)

#define MXC_S_SMON_INTSCN_VDDLOEN_DIS                  (MXC_V_SMON_INTSCN_VDDLOEN_DIS << MXC_F_SMON_INTSCN_VDDLOEN_POS)

#define MXC_V_SMON_INTSCN_VDDLOEN_EN                   ((uint32_t)0x1UL)

#define MXC_S_SMON_INTSCN_VDDLOEN_EN                   (MXC_V_SMON_INTSCN_VDDLOEN_EN << MXC_F_SMON_INTSCN_VDDLOEN_POS)

#define MXC_F_SMON_INTSCN_VDDHIEN_POS                  21

#define MXC_F_SMON_INTSCN_VDDHIEN                      ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VDDHIEN_POS))

#define MXC_V_SMON_INTSCN_VDDHIEN_DIS                  ((uint32_t)0x0UL)

#define MXC_S_SMON_INTSCN_VDDHIEN_DIS                  (MXC_V_SMON_INTSCN_VDDHIEN_DIS << MXC_F_SMON_INTSCN_VDDHIEN_POS)

#define MXC_V_SMON_INTSCN_VDDHIEN_EN                   ((uint32_t)0x1UL)

#define MXC_S_SMON_INTSCN_VDDHIEN_EN                   (MXC_V_SMON_INTSCN_VDDHIEN_EN << MXC_F_SMON_INTSCN_VDDHIEN_POS)

#define MXC_F_SMON_INTSCN_VGLEN_POS                    22

#define MXC_F_SMON_INTSCN_VGLEN                        ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VGLEN_POS))

#define MXC_V_SMON_INTSCN_VGLEN_DIS                    ((uint32_t)0x0UL)

#define MXC_S_SMON_INTSCN_VGLEN_DIS                    (MXC_V_SMON_INTSCN_VGLEN_DIS << MXC_F_SMON_INTSCN_VGLEN_POS)

#define MXC_V_SMON_INTSCN_VGLEN_EN                     ((uint32_t)0x1UL)

#define MXC_S_SMON_INTSCN_VGLEN_EN                     (MXC_V_SMON_INTSCN_VGLEN_EN << MXC_F_SMON_INTSCN_VGLEN_POS)

#define MXC_F_SMON_INTSCN_LOCK_POS                     31

#define MXC_F_SMON_INTSCN_LOCK                         ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_LOCK_POS))

#define MXC_V_SMON_INTSCN_LOCK_UNLOCKED                ((uint32_t)0x0UL)

#define MXC_S_SMON_INTSCN_LOCK_UNLOCKED                (MXC_V_SMON_INTSCN_LOCK_UNLOCKED << MXC_F_SMON_INTSCN_LOCK_POS)

#define MXC_V_SMON_INTSCN_LOCK_LOCKED                  ((uint32_t)0x1UL)

#define MXC_S_SMON_INTSCN_LOCK_LOCKED                  (MXC_V_SMON_INTSCN_LOCK_LOCKED << MXC_F_SMON_INTSCN_LOCK_POS)

#define MXC_F_SMON_SECALM_DRS_POS                      0

#define MXC_F_SMON_SECALM_DRS                          ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_DRS_POS))

#define MXC_V_SMON_SECALM_DRS_COMPLETE                 ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_DRS_COMPLETE                 (MXC_V_SMON_SECALM_DRS_COMPLETE << MXC_F_SMON_SECALM_DRS_POS)

#define MXC_V_SMON_SECALM_DRS_START                    ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_DRS_START                    (MXC_V_SMON_SECALM_DRS_START << MXC_F_SMON_SECALM_DRS_POS)

#define MXC_F_SMON_SECALM_KEYWIPE_POS                  1

#define MXC_F_SMON_SECALM_KEYWIPE                      ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_KEYWIPE_POS))

#define MXC_V_SMON_SECALM_KEYWIPE_COMPLETE             ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_KEYWIPE_COMPLETE             (MXC_V_SMON_SECALM_KEYWIPE_COMPLETE << MXC_F_SMON_SECALM_KEYWIPE_POS)

#define MXC_V_SMON_SECALM_KEYWIPE_START                ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_KEYWIPE_START                (MXC_V_SMON_SECALM_KEYWIPE_START << MXC_F_SMON_SECALM_KEYWIPE_POS)

#define MXC_F_SMON_SECALM_SHIELDF_POS                  2

#define MXC_F_SMON_SECALM_SHIELDF                      ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_SHIELDF_POS))

#define MXC_V_SMON_SECALM_SHIELDF_NOEVENT              ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_SHIELDF_NOEVENT              (MXC_V_SMON_SECALM_SHIELDF_NOEVENT << MXC_F_SMON_SECALM_SHIELDF_POS)

#define MXC_V_SMON_SECALM_SHIELDF_OCCURRED             ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_SHIELDF_OCCURRED             (MXC_V_SMON_SECALM_SHIELDF_OCCURRED << MXC_F_SMON_SECALM_SHIELDF_POS)

#define MXC_F_SMON_SECALM_LOTEMP_POS                   3

#define MXC_F_SMON_SECALM_LOTEMP                       ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_LOTEMP_POS))

#define MXC_V_SMON_SECALM_LOTEMP_NOEVENT               ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_LOTEMP_NOEVENT               (MXC_V_SMON_SECALM_LOTEMP_NOEVENT << MXC_F_SMON_SECALM_LOTEMP_POS)

#define MXC_V_SMON_SECALM_LOTEMP_OCCURRED              ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_LOTEMP_OCCURRED              (MXC_V_SMON_SECALM_LOTEMP_OCCURRED << MXC_F_SMON_SECALM_LOTEMP_POS)

#define MXC_F_SMON_SECALM_HITEMP_POS                   4

#define MXC_F_SMON_SECALM_HITEMP                       ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_HITEMP_POS))

#define MXC_V_SMON_SECALM_HITEMP_NOEVENT               ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_HITEMP_NOEVENT               (MXC_V_SMON_SECALM_HITEMP_NOEVENT << MXC_F_SMON_SECALM_HITEMP_POS)

#define MXC_V_SMON_SECALM_HITEMP_OCCURRED              ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_HITEMP_OCCURRED              (MXC_V_SMON_SECALM_HITEMP_OCCURRED << MXC_F_SMON_SECALM_HITEMP_POS)

#define MXC_F_SMON_SECALM_BATLO_POS                    5

#define MXC_F_SMON_SECALM_BATLO                        ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_BATLO_POS))

#define MXC_V_SMON_SECALM_BATLO_NOEVENT                ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_BATLO_NOEVENT                (MXC_V_SMON_SECALM_BATLO_NOEVENT << MXC_F_SMON_SECALM_BATLO_POS)

#define MXC_V_SMON_SECALM_BATLO_OCCURRED               ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_BATLO_OCCURRED               (MXC_V_SMON_SECALM_BATLO_OCCURRED << MXC_F_SMON_SECALM_BATLO_POS)

#define MXC_F_SMON_SECALM_BATHI_POS                    6

#define MXC_F_SMON_SECALM_BATHI                        ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_BATHI_POS))

#define MXC_V_SMON_SECALM_BATHI_NOEVENT                ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_BATHI_NOEVENT                (MXC_V_SMON_SECALM_BATHI_NOEVENT << MXC_F_SMON_SECALM_BATHI_POS)

#define MXC_V_SMON_SECALM_BATHI_OCCURRED               ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_BATHI_OCCURRED               (MXC_V_SMON_SECALM_BATHI_OCCURRED << MXC_F_SMON_SECALM_BATHI_POS)

#define MXC_F_SMON_SECALM_EXTF_POS                     7

#define MXC_F_SMON_SECALM_EXTF                         ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTF_POS))

#define MXC_V_SMON_SECALM_EXTF_NOEVENT                 ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTF_NOEVENT                 (MXC_V_SMON_SECALM_EXTF_NOEVENT << MXC_F_SMON_SECALM_EXTF_POS)

#define MXC_V_SMON_SECALM_EXTF_OCCURRED                ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTF_OCCURRED                (MXC_V_SMON_SECALM_EXTF_OCCURRED << MXC_F_SMON_SECALM_EXTF_POS)

#define MXC_F_SMON_SECALM_VDDLO_POS                    8

#define MXC_F_SMON_SECALM_VDDLO                        ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VDDLO_POS))

#define MXC_V_SMON_SECALM_VDDLO_NOEVENT                ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_VDDLO_NOEVENT                (MXC_V_SMON_SECALM_VDDLO_NOEVENT << MXC_F_SMON_SECALM_VDDLO_POS)

#define MXC_V_SMON_SECALM_VDDLO_OCCURRED               ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_VDDLO_OCCURRED               (MXC_V_SMON_SECALM_VDDLO_OCCURRED << MXC_F_SMON_SECALM_VDDLO_POS)

#define MXC_F_SMON_SECALM_VCORELO_POS                  9

#define MXC_F_SMON_SECALM_VCORELO                      ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VCORELO_POS))

#define MXC_V_SMON_SECALM_VCORELO_NOEVENT              ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_VCORELO_NOEVENT              (MXC_V_SMON_SECALM_VCORELO_NOEVENT << MXC_F_SMON_SECALM_VCORELO_POS)

#define MXC_V_SMON_SECALM_VCORELO_OCCURRED             ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_VCORELO_OCCURRED             (MXC_V_SMON_SECALM_VCORELO_OCCURRED << MXC_F_SMON_SECALM_VCORELO_POS)

#define MXC_F_SMON_SECALM_VCOREHI_POS                  10

#define MXC_F_SMON_SECALM_VCOREHI                      ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VCOREHI_POS))

#define MXC_V_SMON_SECALM_VCOREHI_NOEVENT              ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_VCOREHI_NOEVENT              (MXC_V_SMON_SECALM_VCOREHI_NOEVENT << MXC_F_SMON_SECALM_VCOREHI_POS)

#define MXC_V_SMON_SECALM_VCOREHI_OCCURRED             ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_VCOREHI_OCCURRED             (MXC_V_SMON_SECALM_VCOREHI_OCCURRED << MXC_F_SMON_SECALM_VCOREHI_POS)

#define MXC_F_SMON_SECALM_VDDHI_POS                    11

#define MXC_F_SMON_SECALM_VDDHI                        ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VDDHI_POS))

#define MXC_V_SMON_SECALM_VDDHI_NOEVENT                ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_VDDHI_NOEVENT                (MXC_V_SMON_SECALM_VDDHI_NOEVENT << MXC_F_SMON_SECALM_VDDHI_POS)

#define MXC_V_SMON_SECALM_VDDHI_OCCURRED               ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_VDDHI_OCCURRED               (MXC_V_SMON_SECALM_VDDHI_OCCURRED << MXC_F_SMON_SECALM_VDDHI_POS)

#define MXC_F_SMON_SECALM_VGL_POS                      12

#define MXC_F_SMON_SECALM_VGL                          ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VGL_POS))

#define MXC_V_SMON_SECALM_VGL_NOEVENT                  ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_VGL_NOEVENT                  (MXC_V_SMON_SECALM_VGL_NOEVENT << MXC_F_SMON_SECALM_VGL_POS)

#define MXC_V_SMON_SECALM_VGL_OCCURRED                 ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_VGL_OCCURRED                 (MXC_V_SMON_SECALM_VGL_OCCURRED << MXC_F_SMON_SECALM_VGL_POS)

#define MXC_F_SMON_SECALM_EXTSTAT0_POS                 16

#define MXC_F_SMON_SECALM_EXTSTAT0                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT0_POS))

#define MXC_V_SMON_SECALM_EXTSTAT0_NOEVENT             ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSTAT0_NOEVENT             (MXC_V_SMON_SECALM_EXTSTAT0_NOEVENT << MXC_F_SMON_SECALM_EXTSTAT0_POS)

#define MXC_V_SMON_SECALM_EXTSTAT0_OCCURRED            ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSTAT0_OCCURRED            (MXC_V_SMON_SECALM_EXTSTAT0_OCCURRED << MXC_F_SMON_SECALM_EXTSTAT0_POS)

#define MXC_F_SMON_SECALM_EXTSTAT1_POS                 17

#define MXC_F_SMON_SECALM_EXTSTAT1                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT1_POS))

#define MXC_V_SMON_SECALM_EXTSTAT1_NOEVENT             ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSTAT1_NOEVENT             (MXC_V_SMON_SECALM_EXTSTAT1_NOEVENT << MXC_F_SMON_SECALM_EXTSTAT1_POS)

#define MXC_V_SMON_SECALM_EXTSTAT1_OCCURRED            ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSTAT1_OCCURRED            (MXC_V_SMON_SECALM_EXTSTAT1_OCCURRED << MXC_F_SMON_SECALM_EXTSTAT1_POS)

#define MXC_F_SMON_SECALM_EXTSTAT2_POS                 18

#define MXC_F_SMON_SECALM_EXTSTAT2                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT2_POS))

#define MXC_V_SMON_SECALM_EXTSTAT2_NOEVENT             ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSTAT2_NOEVENT             (MXC_V_SMON_SECALM_EXTSTAT2_NOEVENT << MXC_F_SMON_SECALM_EXTSTAT2_POS)

#define MXC_V_SMON_SECALM_EXTSTAT2_OCCURRED            ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSTAT2_OCCURRED            (MXC_V_SMON_SECALM_EXTSTAT2_OCCURRED << MXC_F_SMON_SECALM_EXTSTAT2_POS)

#define MXC_F_SMON_SECALM_EXTSTAT3_POS                 19

#define MXC_F_SMON_SECALM_EXTSTAT3                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT3_POS))

#define MXC_V_SMON_SECALM_EXTSTAT3_NOEVENT             ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSTAT3_NOEVENT             (MXC_V_SMON_SECALM_EXTSTAT3_NOEVENT << MXC_F_SMON_SECALM_EXTSTAT3_POS)

#define MXC_V_SMON_SECALM_EXTSTAT3_OCCURRED            ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSTAT3_OCCURRED            (MXC_V_SMON_SECALM_EXTSTAT3_OCCURRED << MXC_F_SMON_SECALM_EXTSTAT3_POS)

#define MXC_F_SMON_SECALM_EXTSTAT4_POS                 20

#define MXC_F_SMON_SECALM_EXTSTAT4                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT4_POS))

#define MXC_V_SMON_SECALM_EXTSTAT4_NOEVENT             ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSTAT4_NOEVENT             (MXC_V_SMON_SECALM_EXTSTAT4_NOEVENT << MXC_F_SMON_SECALM_EXTSTAT4_POS)

#define MXC_V_SMON_SECALM_EXTSTAT4_OCCURRED            ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSTAT4_OCCURRED            (MXC_V_SMON_SECALM_EXTSTAT4_OCCURRED << MXC_F_SMON_SECALM_EXTSTAT4_POS)

#define MXC_F_SMON_SECALM_EXTSTAT5_POS                 21

#define MXC_F_SMON_SECALM_EXTSTAT5                     ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT5_POS))

#define MXC_V_SMON_SECALM_EXTSTAT5_NOEVENT             ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSTAT5_NOEVENT             (MXC_V_SMON_SECALM_EXTSTAT5_NOEVENT << MXC_F_SMON_SECALM_EXTSTAT5_POS)

#define MXC_V_SMON_SECALM_EXTSTAT5_OCCURRED            ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSTAT5_OCCURRED            (MXC_V_SMON_SECALM_EXTSTAT5_OCCURRED << MXC_F_SMON_SECALM_EXTSTAT5_POS)

#define MXC_F_SMON_SECALM_EXTSWARN0_POS                24

#define MXC_F_SMON_SECALM_EXTSWARN0                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN0_POS))

#define MXC_V_SMON_SECALM_EXTSWARN0_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSWARN0_NOEVENT            (MXC_V_SMON_SECALM_EXTSWARN0_NOEVENT << MXC_F_SMON_SECALM_EXTSWARN0_POS)

#define MXC_V_SMON_SECALM_EXTSWARN0_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSWARN0_OCCURRED           (MXC_V_SMON_SECALM_EXTSWARN0_OCCURRED << MXC_F_SMON_SECALM_EXTSWARN0_POS)

#define MXC_F_SMON_SECALM_EXTSWARN1_POS                25

#define MXC_F_SMON_SECALM_EXTSWARN1                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN1_POS))

#define MXC_V_SMON_SECALM_EXTSWARN1_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSWARN1_NOEVENT            (MXC_V_SMON_SECALM_EXTSWARN1_NOEVENT << MXC_F_SMON_SECALM_EXTSWARN1_POS)

#define MXC_V_SMON_SECALM_EXTSWARN1_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSWARN1_OCCURRED           (MXC_V_SMON_SECALM_EXTSWARN1_OCCURRED << MXC_F_SMON_SECALM_EXTSWARN1_POS)

#define MXC_F_SMON_SECALM_EXTSWARN2_POS                26

#define MXC_F_SMON_SECALM_EXTSWARN2                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN2_POS))

#define MXC_V_SMON_SECALM_EXTSWARN2_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSWARN2_NOEVENT            (MXC_V_SMON_SECALM_EXTSWARN2_NOEVENT << MXC_F_SMON_SECALM_EXTSWARN2_POS)

#define MXC_V_SMON_SECALM_EXTSWARN2_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSWARN2_OCCURRED           (MXC_V_SMON_SECALM_EXTSWARN2_OCCURRED << MXC_F_SMON_SECALM_EXTSWARN2_POS)

#define MXC_F_SMON_SECALM_EXTSWARN3_POS                27

#define MXC_F_SMON_SECALM_EXTSWARN3                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN3_POS))

#define MXC_V_SMON_SECALM_EXTSWARN3_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSWARN3_NOEVENT            (MXC_V_SMON_SECALM_EXTSWARN3_NOEVENT << MXC_F_SMON_SECALM_EXTSWARN3_POS)

#define MXC_V_SMON_SECALM_EXTSWARN3_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSWARN3_OCCURRED           (MXC_V_SMON_SECALM_EXTSWARN3_OCCURRED << MXC_F_SMON_SECALM_EXTSWARN3_POS)

#define MXC_F_SMON_SECALM_EXTSWARN4_POS                28

#define MXC_F_SMON_SECALM_EXTSWARN4                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN4_POS))

#define MXC_V_SMON_SECALM_EXTSWARN4_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSWARN4_NOEVENT            (MXC_V_SMON_SECALM_EXTSWARN4_NOEVENT << MXC_F_SMON_SECALM_EXTSWARN4_POS)

#define MXC_V_SMON_SECALM_EXTSWARN4_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSWARN4_OCCURRED           (MXC_V_SMON_SECALM_EXTSWARN4_OCCURRED << MXC_F_SMON_SECALM_EXTSWARN4_POS)

#define MXC_F_SMON_SECALM_EXTSWARN5_POS                29

#define MXC_F_SMON_SECALM_EXTSWARN5                    ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN5_POS))

#define MXC_V_SMON_SECALM_EXTSWARN5_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECALM_EXTSWARN5_NOEVENT            (MXC_V_SMON_SECALM_EXTSWARN5_NOEVENT << MXC_F_SMON_SECALM_EXTSWARN5_POS)

#define MXC_V_SMON_SECALM_EXTSWARN5_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECALM_EXTSWARN5_OCCURRED           (MXC_V_SMON_SECALM_EXTSWARN5_OCCURRED << MXC_F_SMON_SECALM_EXTSWARN5_POS)

#define MXC_F_SMON_SECDIAG_BORF_POS                    0

#define MXC_F_SMON_SECDIAG_BORF                        ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_BORF_POS))

#define MXC_V_SMON_SECDIAG_BORF_NOEVENT                ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_BORF_NOEVENT                (MXC_V_SMON_SECDIAG_BORF_NOEVENT << MXC_F_SMON_SECDIAG_BORF_POS)

#define MXC_V_SMON_SECDIAG_BORF_OCCURRED               ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_BORF_OCCURRED               (MXC_V_SMON_SECDIAG_BORF_OCCURRED << MXC_F_SMON_SECDIAG_BORF_POS)

#define MXC_F_SMON_SECDIAG_SHIELDF_POS                 2

#define MXC_F_SMON_SECDIAG_SHIELDF                     ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_SHIELDF_POS))

#define MXC_V_SMON_SECDIAG_SHIELDF_NOEVENT             ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_SHIELDF_NOEVENT             (MXC_V_SMON_SECDIAG_SHIELDF_NOEVENT << MXC_F_SMON_SECDIAG_SHIELDF_POS)

#define MXC_V_SMON_SECDIAG_SHIELDF_OCCURRED            ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_SHIELDF_OCCURRED            (MXC_V_SMON_SECDIAG_SHIELDF_OCCURRED << MXC_F_SMON_SECDIAG_SHIELDF_POS)

#define MXC_F_SMON_SECDIAG_LOTEMP_POS                  3

#define MXC_F_SMON_SECDIAG_LOTEMP                      ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_LOTEMP_POS))

#define MXC_V_SMON_SECDIAG_LOTEMP_NOEVENT              ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_LOTEMP_NOEVENT              (MXC_V_SMON_SECDIAG_LOTEMP_NOEVENT << MXC_F_SMON_SECDIAG_LOTEMP_POS)

#define MXC_V_SMON_SECDIAG_LOTEMP_OCCURRED             ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_LOTEMP_OCCURRED             (MXC_V_SMON_SECDIAG_LOTEMP_OCCURRED << MXC_F_SMON_SECDIAG_LOTEMP_POS)

#define MXC_F_SMON_SECDIAG_HITEMP_POS                  4

#define MXC_F_SMON_SECDIAG_HITEMP                      ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_HITEMP_POS))

#define MXC_V_SMON_SECDIAG_HITEMP_NOEVENT              ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_HITEMP_NOEVENT              (MXC_V_SMON_SECDIAG_HITEMP_NOEVENT << MXC_F_SMON_SECDIAG_HITEMP_POS)

#define MXC_V_SMON_SECDIAG_HITEMP_OCCURRED             ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_HITEMP_OCCURRED             (MXC_V_SMON_SECDIAG_HITEMP_OCCURRED << MXC_F_SMON_SECDIAG_HITEMP_POS)

#define MXC_F_SMON_SECDIAG_BATLO_POS                   5

#define MXC_F_SMON_SECDIAG_BATLO                       ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_BATLO_POS))

#define MXC_V_SMON_SECDIAG_BATLO_NOEVENT               ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_BATLO_NOEVENT               (MXC_V_SMON_SECDIAG_BATLO_NOEVENT << MXC_F_SMON_SECDIAG_BATLO_POS)

#define MXC_V_SMON_SECDIAG_BATLO_OCCURRED              ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_BATLO_OCCURRED              (MXC_V_SMON_SECDIAG_BATLO_OCCURRED << MXC_F_SMON_SECDIAG_BATLO_POS)

#define MXC_F_SMON_SECDIAG_BATHI_POS                   6

#define MXC_F_SMON_SECDIAG_BATHI                       ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_BATHI_POS))

#define MXC_V_SMON_SECDIAG_BATHI_NOEVENT               ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_BATHI_NOEVENT               (MXC_V_SMON_SECDIAG_BATHI_NOEVENT << MXC_F_SMON_SECDIAG_BATHI_POS)

#define MXC_V_SMON_SECDIAG_BATHI_OCCURRED              ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_BATHI_OCCURRED              (MXC_V_SMON_SECDIAG_BATHI_OCCURRED << MXC_F_SMON_SECDIAG_BATHI_POS)

#define MXC_F_SMON_SECDIAG_DYNF_POS                    7

#define MXC_F_SMON_SECDIAG_DYNF                        ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_DYNF_POS))

#define MXC_V_SMON_SECDIAG_DYNF_NOEVENT                ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_DYNF_NOEVENT                (MXC_V_SMON_SECDIAG_DYNF_NOEVENT << MXC_F_SMON_SECDIAG_DYNF_POS)

#define MXC_V_SMON_SECDIAG_DYNF_OCCURRED               ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_DYNF_OCCURRED               (MXC_V_SMON_SECDIAG_DYNF_OCCURRED << MXC_F_SMON_SECDIAG_DYNF_POS)

#define MXC_F_SMON_SECDIAG_AESKT_POS                   8

#define MXC_F_SMON_SECDIAG_AESKT                       ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_AESKT_POS))

#define MXC_V_SMON_SECDIAG_AESKT_INCOMPLETE            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_AESKT_INCOMPLETE            (MXC_V_SMON_SECDIAG_AESKT_INCOMPLETE << MXC_F_SMON_SECDIAG_AESKT_POS)

#define MXC_V_SMON_SECDIAG_AESKT_COMPLETE              ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_AESKT_COMPLETE              (MXC_V_SMON_SECDIAG_AESKT_COMPLETE << MXC_F_SMON_SECDIAG_AESKT_POS)

#define MXC_F_SMON_SECDIAG_EXTSTAT0_POS                16

#define MXC_F_SMON_SECDIAG_EXTSTAT0                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT0_POS))

#define MXC_V_SMON_SECDIAG_EXTSTAT0_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT0_NOEVENT            (MXC_V_SMON_SECDIAG_EXTSTAT0_NOEVENT << MXC_F_SMON_SECDIAG_EXTSTAT0_POS)

#define MXC_V_SMON_SECDIAG_EXTSTAT0_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT0_OCCURRED           (MXC_V_SMON_SECDIAG_EXTSTAT0_OCCURRED << MXC_F_SMON_SECDIAG_EXTSTAT0_POS)

#define MXC_F_SMON_SECDIAG_EXTSTAT1_POS                17

#define MXC_F_SMON_SECDIAG_EXTSTAT1                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT1_POS))

#define MXC_V_SMON_SECDIAG_EXTSTAT1_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT1_NOEVENT            (MXC_V_SMON_SECDIAG_EXTSTAT1_NOEVENT << MXC_F_SMON_SECDIAG_EXTSTAT1_POS)

#define MXC_V_SMON_SECDIAG_EXTSTAT1_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT1_OCCURRED           (MXC_V_SMON_SECDIAG_EXTSTAT1_OCCURRED << MXC_F_SMON_SECDIAG_EXTSTAT1_POS)

#define MXC_F_SMON_SECDIAG_EXTSTAT2_POS                18

#define MXC_F_SMON_SECDIAG_EXTSTAT2                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT2_POS))

#define MXC_V_SMON_SECDIAG_EXTSTAT2_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT2_NOEVENT            (MXC_V_SMON_SECDIAG_EXTSTAT2_NOEVENT << MXC_F_SMON_SECDIAG_EXTSTAT2_POS)

#define MXC_V_SMON_SECDIAG_EXTSTAT2_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT2_OCCURRED           (MXC_V_SMON_SECDIAG_EXTSTAT2_OCCURRED << MXC_F_SMON_SECDIAG_EXTSTAT2_POS)

#define MXC_F_SMON_SECDIAG_EXTSTAT3_POS                19

#define MXC_F_SMON_SECDIAG_EXTSTAT3                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT3_POS))

#define MXC_V_SMON_SECDIAG_EXTSTAT3_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT3_NOEVENT            (MXC_V_SMON_SECDIAG_EXTSTAT3_NOEVENT << MXC_F_SMON_SECDIAG_EXTSTAT3_POS)

#define MXC_V_SMON_SECDIAG_EXTSTAT3_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT3_OCCURRED           (MXC_V_SMON_SECDIAG_EXTSTAT3_OCCURRED << MXC_F_SMON_SECDIAG_EXTSTAT3_POS)

#define MXC_F_SMON_SECDIAG_EXTSTAT4_POS                20

#define MXC_F_SMON_SECDIAG_EXTSTAT4                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT4_POS))

#define MXC_V_SMON_SECDIAG_EXTSTAT4_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT4_NOEVENT            (MXC_V_SMON_SECDIAG_EXTSTAT4_NOEVENT << MXC_F_SMON_SECDIAG_EXTSTAT4_POS)

#define MXC_V_SMON_SECDIAG_EXTSTAT4_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT4_OCCURRED           (MXC_V_SMON_SECDIAG_EXTSTAT4_OCCURRED << MXC_F_SMON_SECDIAG_EXTSTAT4_POS)

#define MXC_F_SMON_SECDIAG_EXTSTAT5_POS                21

#define MXC_F_SMON_SECDIAG_EXTSTAT5                    ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT5_POS))

#define MXC_V_SMON_SECDIAG_EXTSTAT5_NOEVENT            ((uint32_t)0x0UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT5_NOEVENT            (MXC_V_SMON_SECDIAG_EXTSTAT5_NOEVENT << MXC_F_SMON_SECDIAG_EXTSTAT5_POS)

#define MXC_V_SMON_SECDIAG_EXTSTAT5_OCCURRED           ((uint32_t)0x1UL)

#define MXC_S_SMON_SECDIAG_EXTSTAT5_OCCURRED           (MXC_V_SMON_SECDIAG_EXTSTAT5_OCCURRED << MXC_F_SMON_SECDIAG_EXTSTAT5_POS)

#define MXC_F_SMON_DLRTC_DLRTC_POS                     0

#define MXC_F_SMON_DLRTC_DLRTC                         ((uint32_t)(0xFFFFFFFFUL << MXC_F_SMON_DLRTC_DLRTC_POS))

#define MXC_F_SMON_SECST_EXTSRS_POS                    0

#define MXC_F_SMON_SECST_EXTSRS                        ((uint32_t)(0x1UL << MXC_F_SMON_SECST_EXTSRS_POS))

#define MXC_V_SMON_SECST_EXTSRS_ALLOWED                ((uint32_t)0x0UL)

#define MXC_S_SMON_SECST_EXTSRS_ALLOWED                (MXC_V_SMON_SECST_EXTSRS_ALLOWED << MXC_F_SMON_SECST_EXTSRS_POS)

#define MXC_V_SMON_SECST_EXTSRS_NOTALLOWED             ((uint32_t)0x1UL)

#define MXC_S_SMON_SECST_EXTSRS_NOTALLOWED             (MXC_V_SMON_SECST_EXTSRS_NOTALLOWED << MXC_F_SMON_SECST_EXTSRS_POS)

#define MXC_F_SMON_SECST_INTSRS_POS                    1

#define MXC_F_SMON_SECST_INTSRS                        ((uint32_t)(0x1UL << MXC_F_SMON_SECST_INTSRS_POS))

#define MXC_V_SMON_SECST_INTSRS_ALLOWED                ((uint32_t)0x0UL)

#define MXC_S_SMON_SECST_INTSRS_ALLOWED                (MXC_V_SMON_SECST_INTSRS_ALLOWED << MXC_F_SMON_SECST_INTSRS_POS)

#define MXC_V_SMON_SECST_INTSRS_NOTALLOWED             ((uint32_t)0x1UL)

#define MXC_S_SMON_SECST_INTSRS_NOTALLOWED             (MXC_V_SMON_SECST_INTSRS_NOTALLOWED << MXC_F_SMON_SECST_INTSRS_POS)

#define MXC_F_SMON_SECST_SECALRS_POS                   2

#define MXC_F_SMON_SECST_SECALRS                       ((uint32_t)(0x1UL << MXC_F_SMON_SECST_SECALRS_POS))

#define MXC_V_SMON_SECST_SECALRS_ALLOWED               ((uint32_t)0x0UL)

#define MXC_S_SMON_SECST_SECALRS_ALLOWED               (MXC_V_SMON_SECST_SECALRS_ALLOWED << MXC_F_SMON_SECST_SECALRS_POS)

#define MXC_V_SMON_SECST_SECALRS_NOTALLOWED            ((uint32_t)0x1UL)

#define MXC_S_SMON_SECST_SECALRS_NOTALLOWED            (MXC_V_SMON_SECST_SECALRS_NOTALLOWED << MXC_F_SMON_SECST_SECALRS_POS)

#ifdef __cplusplus

}

#endif


#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32650_INCLUDE_SMON_REGS_H_

mxc_smon_regs_t::secalm
__IO uint32_t secalm
Definition: smon_regs.h:79

mxc_smon_regs_t::intscn
__IO uint32_t intscn
Definition: smon_regs.h:78

mxc_smon_regs_t::dlrtc
__I uint32_t dlrtc
Definition: smon_regs.h:81

mxc_smon_regs_t::secst
__IO uint32_t secst
Definition: smon_regs.h:83

mxc_smon_regs_t::secdiag
__I uint32_t secdiag
Definition: smon_regs.h:80

mxc_smon_regs_t::extscn
__IO uint32_t extscn
Definition: smon_regs.h:77

mxc_smon_regs_t
Definition: smon_regs.h:76