MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
•All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Modules Pages
Data Structures | Macros
spimss_regs.h File Reference
SPIMSS » SPIMSS_Registers
#include <stdint.h>

Go to the source code of this file.

Data Structures

struct  mxc_spimss_regs_t
 

Macros

#define MXC_R_SPIMSS_DATA   ((uint32_t)0x00000000UL)
 
#define MXC_R_SPIMSS_CTRL   ((uint32_t)0x00000004UL)
 
#define MXC_R_SPIMSS_INT_FL   ((uint32_t)0x00000008UL)
 
#define MXC_R_SPIMSS_MOD   ((uint32_t)0x0000000CUL)
 
#define MXC_R_SPIMSS_BRG   ((uint32_t)0x00000014UL)
 
#define MXC_R_SPIMSS_DMA   ((uint32_t)0x00000018UL)
 
#define MXC_R_SPIMSS_I2S_CTRL   ((uint32_t)0x0000001CUL)
 
#define MXC_F_SPIMSS_DATA_DATA_POS   0
 
#define MXC_F_SPIMSS_DATA_DATA   ((uint32_t)(0xFFFFUL << MXC_F_SPIMSS_DATA_DATA_POS))
 
#define MXC_F_SPIMSS_CTRL_START_POS   0
 
#define MXC_F_SPIMSS_CTRL_START   ((uint32_t)(0x1UL << MXC_F_SPIMSS_CTRL_START_POS))
 
#define MXC_V_SPIMSS_CTRL_START_STOP   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_CTRL_START_STOP   (MXC_V_SPIMSS_CTRL_START_STOP << MXC_F_SPIMSS_CTRL_START_POS)
 
#define MXC_V_SPIMSS_CTRL_START_START   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_CTRL_START_START   (MXC_V_SPIMSS_CTRL_START_START << MXC_F_SPIMSS_CTRL_START_POS)
 
#define MXC_F_SPIMSS_CTRL_MMEN_POS   1
 
#define MXC_F_SPIMSS_CTRL_MMEN   ((uint32_t)(0x1UL << MXC_F_SPIMSS_CTRL_MMEN_POS))
 
#define MXC_V_SPIMSS_CTRL_MMEN_SLAVE   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_CTRL_MMEN_SLAVE   (MXC_V_SPIMSS_CTRL_MMEN_SLAVE << MXC_F_SPIMSS_CTRL_MMEN_POS)
 
#define MXC_V_SPIMSS_CTRL_MMEN_MASTER   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_CTRL_MMEN_MASTER   (MXC_V_SPIMSS_CTRL_MMEN_MASTER << MXC_F_SPIMSS_CTRL_MMEN_POS)
 
#define MXC_F_SPIMSS_CTRL_OD_OUT_EN_POS   2
 
#define MXC_F_SPIMSS_CTRL_OD_OUT_EN   ((uint32_t)(0x1UL << MXC_F_SPIMSS_CTRL_OD_OUT_EN_POS))
 
#define MXC_V_SPIMSS_CTRL_OD_OUT_EN_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_CTRL_OD_OUT_EN_DIS   (MXC_V_SPIMSS_CTRL_OD_OUT_EN_DIS << MXC_F_SPIMSS_CTRL_OD_OUT_EN_POS)
 
#define MXC_V_SPIMSS_CTRL_OD_OUT_EN_EN   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_CTRL_OD_OUT_EN_EN   (MXC_V_SPIMSS_CTRL_OD_OUT_EN_EN << MXC_F_SPIMSS_CTRL_OD_OUT_EN_POS)
 
#define MXC_F_SPIMSS_CTRL_CLKPOL_POS   3
 
#define MXC_F_SPIMSS_CTRL_CLKPOL   ((uint32_t)(0x1UL << MXC_F_SPIMSS_CTRL_CLKPOL_POS))
 
#define MXC_V_SPIMSS_CTRL_CLKPOL_IDLELO   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_CTRL_CLKPOL_IDLELO   (MXC_V_SPIMSS_CTRL_CLKPOL_IDLELO << MXC_F_SPIMSS_CTRL_CLKPOL_POS)
 
#define MXC_V_SPIMSS_CTRL_CLKPOL_IDLEHI   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_CTRL_CLKPOL_IDLEHI   (MXC_V_SPIMSS_CTRL_CLKPOL_IDLEHI << MXC_F_SPIMSS_CTRL_CLKPOL_POS)
 
#define MXC_F_SPIMSS_CTRL_PHASE_POS   4
 
#define MXC_F_SPIMSS_CTRL_PHASE   ((uint32_t)(0x1UL << MXC_F_SPIMSS_CTRL_PHASE_POS))
 
#define MXC_V_SPIMSS_CTRL_PHASE_ACTIVEEDGE   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_CTRL_PHASE_ACTIVEEDGE   (MXC_V_SPIMSS_CTRL_PHASE_ACTIVEEDGE << MXC_F_SPIMSS_CTRL_PHASE_POS)
 
#define MXC_V_SPIMSS_CTRL_PHASE_INACTIVEEDGE   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_CTRL_PHASE_INACTIVEEDGE   (MXC_V_SPIMSS_CTRL_PHASE_INACTIVEEDGE << MXC_F_SPIMSS_CTRL_PHASE_POS)
 
#define MXC_F_SPIMSS_CTRL_BIRQ_POS   5
 
#define MXC_F_SPIMSS_CTRL_BIRQ   ((uint32_t)(0x1UL << MXC_F_SPIMSS_CTRL_BIRQ_POS))
 
#define MXC_V_SPIMSS_CTRL_BIRQ_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_CTRL_BIRQ_DIS   (MXC_V_SPIMSS_CTRL_BIRQ_DIS << MXC_F_SPIMSS_CTRL_BIRQ_POS)
 
#define MXC_V_SPIMSS_CTRL_BIRQ_EN   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_CTRL_BIRQ_EN   (MXC_V_SPIMSS_CTRL_BIRQ_EN << MXC_F_SPIMSS_CTRL_BIRQ_POS)
 
#define MXC_F_SPIMSS_CTRL_STR_POS   6
 
#define MXC_F_SPIMSS_CTRL_STR   ((uint32_t)(0x1UL << MXC_F_SPIMSS_CTRL_STR_POS))
 
#define MXC_V_SPIMSS_CTRL_STR_COMPLETE   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_CTRL_STR_COMPLETE   (MXC_V_SPIMSS_CTRL_STR_COMPLETE << MXC_F_SPIMSS_CTRL_STR_POS)
 
#define MXC_V_SPIMSS_CTRL_STR_START   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_CTRL_STR_START   (MXC_V_SPIMSS_CTRL_STR_START << MXC_F_SPIMSS_CTRL_STR_POS)
 
#define MXC_F_SPIMSS_CTRL_IRQE_POS   7
 
#define MXC_F_SPIMSS_CTRL_IRQE   ((uint32_t)(0x1UL << MXC_F_SPIMSS_CTRL_IRQE_POS))
 
#define MXC_V_SPIMSS_CTRL_IRQE_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_CTRL_IRQE_DIS   (MXC_V_SPIMSS_CTRL_IRQE_DIS << MXC_F_SPIMSS_CTRL_IRQE_POS)
 
#define MXC_V_SPIMSS_CTRL_IRQE_EN   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_CTRL_IRQE_EN   (MXC_V_SPIMSS_CTRL_IRQE_EN << MXC_F_SPIMSS_CTRL_IRQE_POS)
 
#define MXC_F_SPIMSS_INT_FL_SLAS_POS   0
 
#define MXC_F_SPIMSS_INT_FL_SLAS   ((uint32_t)(0x1UL << MXC_F_SPIMSS_INT_FL_SLAS_POS))
 
#define MXC_V_SPIMSS_INT_FL_SLAS_SELECTED   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_INT_FL_SLAS_SELECTED   (MXC_V_SPIMSS_INT_FL_SLAS_SELECTED << MXC_F_SPIMSS_INT_FL_SLAS_POS)
 
#define MXC_V_SPIMSS_INT_FL_SLAS_NOTSELECTED   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_INT_FL_SLAS_NOTSELECTED   (MXC_V_SPIMSS_INT_FL_SLAS_NOTSELECTED << MXC_F_SPIMSS_INT_FL_SLAS_POS)
 
#define MXC_F_SPIMSS_INT_FL_TXST_POS   1
 
#define MXC_F_SPIMSS_INT_FL_TXST   ((uint32_t)(0x1UL << MXC_F_SPIMSS_INT_FL_TXST_POS))
 
#define MXC_V_SPIMSS_INT_FL_TXST_IDLE   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_INT_FL_TXST_IDLE   (MXC_V_SPIMSS_INT_FL_TXST_IDLE << MXC_F_SPIMSS_INT_FL_TXST_POS)
 
#define MXC_V_SPIMSS_INT_FL_TXST_BUSY   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_INT_FL_TXST_BUSY   (MXC_V_SPIMSS_INT_FL_TXST_BUSY << MXC_F_SPIMSS_INT_FL_TXST_POS)
 
#define MXC_F_SPIMSS_INT_FL_TUND_POS   2
 
#define MXC_F_SPIMSS_INT_FL_TUND   ((uint32_t)(0x1UL << MXC_F_SPIMSS_INT_FL_TUND_POS))
 
#define MXC_V_SPIMSS_INT_FL_TUND_NOEVENT   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_INT_FL_TUND_NOEVENT   (MXC_V_SPIMSS_INT_FL_TUND_NOEVENT << MXC_F_SPIMSS_INT_FL_TUND_POS)
 
#define MXC_V_SPIMSS_INT_FL_TUND_UNDERRUN   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_INT_FL_TUND_UNDERRUN   (MXC_V_SPIMSS_INT_FL_TUND_UNDERRUN << MXC_F_SPIMSS_INT_FL_TUND_POS)
 
#define MXC_F_SPIMSS_INT_FL_ROVR_POS   3
 
#define MXC_F_SPIMSS_INT_FL_ROVR   ((uint32_t)(0x1UL << MXC_F_SPIMSS_INT_FL_ROVR_POS))
 
#define MXC_V_SPIMSS_INT_FL_ROVR_NOEVENT   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_INT_FL_ROVR_NOEVENT   (MXC_V_SPIMSS_INT_FL_ROVR_NOEVENT << MXC_F_SPIMSS_INT_FL_ROVR_POS)
 
#define MXC_V_SPIMSS_INT_FL_ROVR_OVERRUN   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_INT_FL_ROVR_OVERRUN   (MXC_V_SPIMSS_INT_FL_ROVR_OVERRUN << MXC_F_SPIMSS_INT_FL_ROVR_POS)
 
#define MXC_F_SPIMSS_INT_FL_ABT_POS   4
 
#define MXC_F_SPIMSS_INT_FL_ABT   ((uint32_t)(0x1UL << MXC_F_SPIMSS_INT_FL_ABT_POS))
 
#define MXC_V_SPIMSS_INT_FL_ABT_NOEVENT   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_INT_FL_ABT_NOEVENT   (MXC_V_SPIMSS_INT_FL_ABT_NOEVENT << MXC_F_SPIMSS_INT_FL_ABT_POS)
 
#define MXC_V_SPIMSS_INT_FL_ABT_ABORTED   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_INT_FL_ABT_ABORTED   (MXC_V_SPIMSS_INT_FL_ABT_ABORTED << MXC_F_SPIMSS_INT_FL_ABT_POS)
 
#define MXC_F_SPIMSS_INT_FL_COL_POS   5
 
#define MXC_F_SPIMSS_INT_FL_COL   ((uint32_t)(0x1UL << MXC_F_SPIMSS_INT_FL_COL_POS))
 
#define MXC_V_SPIMSS_INT_FL_COL_NOEVENT   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_INT_FL_COL_NOEVENT   (MXC_V_SPIMSS_INT_FL_COL_NOEVENT << MXC_F_SPIMSS_INT_FL_COL_POS)
 
#define MXC_V_SPIMSS_INT_FL_COL_COLLISION   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_INT_FL_COL_COLLISION   (MXC_V_SPIMSS_INT_FL_COL_COLLISION << MXC_F_SPIMSS_INT_FL_COL_POS)
 
#define MXC_F_SPIMSS_INT_FL_TOVR_POS   6
 
#define MXC_F_SPIMSS_INT_FL_TOVR   ((uint32_t)(0x1UL << MXC_F_SPIMSS_INT_FL_TOVR_POS))
 
#define MXC_V_SPIMSS_INT_FL_TOVR_NOEVENT   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_INT_FL_TOVR_NOEVENT   (MXC_V_SPIMSS_INT_FL_TOVR_NOEVENT << MXC_F_SPIMSS_INT_FL_TOVR_POS)
 
#define MXC_V_SPIMSS_INT_FL_TOVR_OVERRUN   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_INT_FL_TOVR_OVERRUN   (MXC_V_SPIMSS_INT_FL_TOVR_OVERRUN << MXC_F_SPIMSS_INT_FL_TOVR_POS)
 
#define MXC_F_SPIMSS_INT_FL_IRQ_POS   7
 
#define MXC_F_SPIMSS_INT_FL_IRQ   ((uint32_t)(0x1UL << MXC_F_SPIMSS_INT_FL_IRQ_POS))
 
#define MXC_V_SPIMSS_INT_FL_IRQ_INACTIVE   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_INT_FL_IRQ_INACTIVE   (MXC_V_SPIMSS_INT_FL_IRQ_INACTIVE << MXC_F_SPIMSS_INT_FL_IRQ_POS)
 
#define MXC_V_SPIMSS_INT_FL_IRQ_PENDING   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_INT_FL_IRQ_PENDING   (MXC_V_SPIMSS_INT_FL_IRQ_PENDING << MXC_F_SPIMSS_INT_FL_IRQ_POS)
 
#define MXC_F_SPIMSS_MOD_SSV_POS   0
 
#define MXC_F_SPIMSS_MOD_SSV   ((uint32_t)(0x1UL << MXC_F_SPIMSS_MOD_SSV_POS))
 
#define MXC_V_SPIMSS_MOD_SSV_LO   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_MOD_SSV_LO   (MXC_V_SPIMSS_MOD_SSV_LO << MXC_F_SPIMSS_MOD_SSV_POS)
 
#define MXC_V_SPIMSS_MOD_SSV_HI   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_MOD_SSV_HI   (MXC_V_SPIMSS_MOD_SSV_HI << MXC_F_SPIMSS_MOD_SSV_POS)
 
#define MXC_F_SPIMSS_MOD_SSEL_POS   1
 
#define MXC_F_SPIMSS_MOD_SSEL   ((uint32_t)(0x1UL << MXC_F_SPIMSS_MOD_SSEL_POS))
 
#define MXC_V_SPIMSS_MOD_SSEL_INPUT   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_MOD_SSEL_INPUT   (MXC_V_SPIMSS_MOD_SSEL_INPUT << MXC_F_SPIMSS_MOD_SSEL_POS)
 
#define MXC_V_SPIMSS_MOD_SSEL_OUTPUT   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_MOD_SSEL_OUTPUT   (MXC_V_SPIMSS_MOD_SSEL_OUTPUT << MXC_F_SPIMSS_MOD_SSEL_POS)
 
#define MXC_F_SPIMSS_MOD_NUMBITS_POS   2
 
#define MXC_F_SPIMSS_MOD_NUMBITS   ((uint32_t)(0xFUL << MXC_F_SPIMSS_MOD_NUMBITS_POS))
 
#define MXC_V_SPIMSS_MOD_NUMBITS_16BITS   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_16BITS   (MXC_V_SPIMSS_MOD_NUMBITS_16BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_1BITS   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_1BITS   (MXC_V_SPIMSS_MOD_NUMBITS_1BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_2BITS   ((uint32_t)0x2UL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_2BITS   (MXC_V_SPIMSS_MOD_NUMBITS_2BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_3BITS   ((uint32_t)0x3UL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_3BITS   (MXC_V_SPIMSS_MOD_NUMBITS_3BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_4BITS   ((uint32_t)0x4UL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_4BITS   (MXC_V_SPIMSS_MOD_NUMBITS_4BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_5BITS   ((uint32_t)0x5UL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_5BITS   (MXC_V_SPIMSS_MOD_NUMBITS_5BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_6BITS   ((uint32_t)0x6UL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_6BITS   (MXC_V_SPIMSS_MOD_NUMBITS_6BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_7BITS   ((uint32_t)0x7UL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_7BITS   (MXC_V_SPIMSS_MOD_NUMBITS_7BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_8BITS   ((uint32_t)0x8UL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_8BITS   (MXC_V_SPIMSS_MOD_NUMBITS_8BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_9BITS   ((uint32_t)0x9UL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_9BITS   (MXC_V_SPIMSS_MOD_NUMBITS_9BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_10BITS   ((uint32_t)0xAUL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_10BITS   (MXC_V_SPIMSS_MOD_NUMBITS_10BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_11BITS   ((uint32_t)0xBUL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_11BITS   (MXC_V_SPIMSS_MOD_NUMBITS_11BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_12BITS   ((uint32_t)0xCUL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_12BITS   (MXC_V_SPIMSS_MOD_NUMBITS_12BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_13BITS   ((uint32_t)0xDUL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_13BITS   (MXC_V_SPIMSS_MOD_NUMBITS_13BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_14BITS   ((uint32_t)0xEUL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_14BITS   (MXC_V_SPIMSS_MOD_NUMBITS_14BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_V_SPIMSS_MOD_NUMBITS_15BITS   ((uint32_t)0xFUL)
 
#define MXC_S_SPIMSS_MOD_NUMBITS_15BITS   (MXC_V_SPIMSS_MOD_NUMBITS_15BITS << MXC_F_SPIMSS_MOD_NUMBITS_POS)
 
#define MXC_F_SPIMSS_MOD_TX_ALIGN_POS   7
 
#define MXC_F_SPIMSS_MOD_TX_ALIGN   ((uint32_t)(0x1UL << MXC_F_SPIMSS_MOD_TX_ALIGN_POS))
 
#define MXC_V_SPIMSS_MOD_TX_ALIGN_LSB   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_MOD_TX_ALIGN_LSB   (MXC_V_SPIMSS_MOD_TX_ALIGN_LSB << MXC_F_SPIMSS_MOD_TX_ALIGN_POS)
 
#define MXC_V_SPIMSS_MOD_TX_ALIGN_MSB   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_MOD_TX_ALIGN_MSB   (MXC_V_SPIMSS_MOD_TX_ALIGN_MSB << MXC_F_SPIMSS_MOD_TX_ALIGN_POS)
 
#define MXC_F_SPIMSS_BRG_DIV_POS   0
 
#define MXC_F_SPIMSS_BRG_DIV   ((uint32_t)(0xFFFFUL << MXC_F_SPIMSS_BRG_DIV_POS))
 
#define MXC_F_SPIMSS_DMA_TX_FIFO_LVL_POS   0
 
#define MXC_F_SPIMSS_DMA_TX_FIFO_LVL   ((uint32_t)(0x7UL << MXC_F_SPIMSS_DMA_TX_FIFO_LVL_POS))
 
#define MXC_V_SPIMSS_DMA_TX_FIFO_LVL_1ENTRIES   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_DMA_TX_FIFO_LVL_1ENTRIES   (MXC_V_SPIMSS_DMA_TX_FIFO_LVL_1ENTRIES << MXC_F_SPIMSS_DMA_TX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_TX_FIFO_LVL_2ENTRIES   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_DMA_TX_FIFO_LVL_2ENTRIES   (MXC_V_SPIMSS_DMA_TX_FIFO_LVL_2ENTRIES << MXC_F_SPIMSS_DMA_TX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_TX_FIFO_LVL_3ENTRIES   ((uint32_t)0x2UL)
 
#define MXC_S_SPIMSS_DMA_TX_FIFO_LVL_3ENTRIES   (MXC_V_SPIMSS_DMA_TX_FIFO_LVL_3ENTRIES << MXC_F_SPIMSS_DMA_TX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_TX_FIFO_LVL_4ENTRIES   ((uint32_t)0x3UL)
 
#define MXC_S_SPIMSS_DMA_TX_FIFO_LVL_4ENTRIES   (MXC_V_SPIMSS_DMA_TX_FIFO_LVL_4ENTRIES << MXC_F_SPIMSS_DMA_TX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_TX_FIFO_LVL_5ENTRIES   ((uint32_t)0x4UL)
 
#define MXC_S_SPIMSS_DMA_TX_FIFO_LVL_5ENTRIES   (MXC_V_SPIMSS_DMA_TX_FIFO_LVL_5ENTRIES << MXC_F_SPIMSS_DMA_TX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_TX_FIFO_LVL_6ENTRIES   ((uint32_t)0x5UL)
 
#define MXC_S_SPIMSS_DMA_TX_FIFO_LVL_6ENTRIES   (MXC_V_SPIMSS_DMA_TX_FIFO_LVL_6ENTRIES << MXC_F_SPIMSS_DMA_TX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_TX_FIFO_LVL_7ENTRIES   ((uint32_t)0x6UL)
 
#define MXC_S_SPIMSS_DMA_TX_FIFO_LVL_7ENTRIES   (MXC_V_SPIMSS_DMA_TX_FIFO_LVL_7ENTRIES << MXC_F_SPIMSS_DMA_TX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_TX_FIFO_LVL_8ENTRIES   ((uint32_t)0x7UL)
 
#define MXC_S_SPIMSS_DMA_TX_FIFO_LVL_8ENTRIES   (MXC_V_SPIMSS_DMA_TX_FIFO_LVL_8ENTRIES << MXC_F_SPIMSS_DMA_TX_FIFO_LVL_POS)
 
#define MXC_F_SPIMSS_DMA_TX_FIFO_CLR_POS   4
 
#define MXC_F_SPIMSS_DMA_TX_FIFO_CLR   ((uint32_t)(0x1UL << MXC_F_SPIMSS_DMA_TX_FIFO_CLR_POS))
 
#define MXC_V_SPIMSS_DMA_TX_FIFO_CLR_CLEAR   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_DMA_TX_FIFO_CLR_CLEAR   (MXC_V_SPIMSS_DMA_TX_FIFO_CLR_CLEAR << MXC_F_SPIMSS_DMA_TX_FIFO_CLR_POS)
 
#define MXC_F_SPIMSS_DMA_TX_FIFO_CNT_POS   8
 
#define MXC_F_SPIMSS_DMA_TX_FIFO_CNT   ((uint32_t)(0xFUL << MXC_F_SPIMSS_DMA_TX_FIFO_CNT_POS))
 
#define MXC_F_SPIMSS_DMA_TX_DMA_EN_POS   15
 
#define MXC_F_SPIMSS_DMA_TX_DMA_EN   ((uint32_t)(0x1UL << MXC_F_SPIMSS_DMA_TX_DMA_EN_POS))
 
#define MXC_V_SPIMSS_DMA_TX_DMA_EN_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_DMA_TX_DMA_EN_DIS   (MXC_V_SPIMSS_DMA_TX_DMA_EN_DIS << MXC_F_SPIMSS_DMA_TX_DMA_EN_POS)
 
#define MXC_V_SPIMSS_DMA_TX_DMA_EN_EN   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_DMA_TX_DMA_EN_EN   (MXC_V_SPIMSS_DMA_TX_DMA_EN_EN << MXC_F_SPIMSS_DMA_TX_DMA_EN_POS)
 
#define MXC_F_SPIMSS_DMA_RX_FIFO_LVL_POS   16
 
#define MXC_F_SPIMSS_DMA_RX_FIFO_LVL   ((uint32_t)(0x7UL << MXC_F_SPIMSS_DMA_RX_FIFO_LVL_POS))
 
#define MXC_V_SPIMSS_DMA_RX_FIFO_LVL_1ENTRIES   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_DMA_RX_FIFO_LVL_1ENTRIES   (MXC_V_SPIMSS_DMA_RX_FIFO_LVL_1ENTRIES << MXC_F_SPIMSS_DMA_RX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_RX_FIFO_LVL_2ENTRIES   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_DMA_RX_FIFO_LVL_2ENTRIES   (MXC_V_SPIMSS_DMA_RX_FIFO_LVL_2ENTRIES << MXC_F_SPIMSS_DMA_RX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_RX_FIFO_LVL_3ENTRIES   ((uint32_t)0x2UL)
 
#define MXC_S_SPIMSS_DMA_RX_FIFO_LVL_3ENTRIES   (MXC_V_SPIMSS_DMA_RX_FIFO_LVL_3ENTRIES << MXC_F_SPIMSS_DMA_RX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_RX_FIFO_LVL_4ENTRIES   ((uint32_t)0x3UL)
 
#define MXC_S_SPIMSS_DMA_RX_FIFO_LVL_4ENTRIES   (MXC_V_SPIMSS_DMA_RX_FIFO_LVL_4ENTRIES << MXC_F_SPIMSS_DMA_RX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_RX_FIFO_LVL_5ENTRIES   ((uint32_t)0x4UL)
 
#define MXC_S_SPIMSS_DMA_RX_FIFO_LVL_5ENTRIES   (MXC_V_SPIMSS_DMA_RX_FIFO_LVL_5ENTRIES << MXC_F_SPIMSS_DMA_RX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_RX_FIFO_LVL_6ENTRIES   ((uint32_t)0x5UL)
 
#define MXC_S_SPIMSS_DMA_RX_FIFO_LVL_6ENTRIES   (MXC_V_SPIMSS_DMA_RX_FIFO_LVL_6ENTRIES << MXC_F_SPIMSS_DMA_RX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_RX_FIFO_LVL_7ENTRIES   ((uint32_t)0x6UL)
 
#define MXC_S_SPIMSS_DMA_RX_FIFO_LVL_7ENTRIES   (MXC_V_SPIMSS_DMA_RX_FIFO_LVL_7ENTRIES << MXC_F_SPIMSS_DMA_RX_FIFO_LVL_POS)
 
#define MXC_V_SPIMSS_DMA_RX_FIFO_LVL_8ENTRIES   ((uint32_t)0x7UL)
 
#define MXC_S_SPIMSS_DMA_RX_FIFO_LVL_8ENTRIES   (MXC_V_SPIMSS_DMA_RX_FIFO_LVL_8ENTRIES << MXC_F_SPIMSS_DMA_RX_FIFO_LVL_POS)
 
#define MXC_F_SPIMSS_DMA_RX_FIFO_CLR_POS   20
 
#define MXC_F_SPIMSS_DMA_RX_FIFO_CLR   ((uint32_t)(0x1UL << MXC_F_SPIMSS_DMA_RX_FIFO_CLR_POS))
 
#define MXC_V_SPIMSS_DMA_RX_FIFO_CLR_CLEAR   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_DMA_RX_FIFO_CLR_CLEAR   (MXC_V_SPIMSS_DMA_RX_FIFO_CLR_CLEAR << MXC_F_SPIMSS_DMA_RX_FIFO_CLR_POS)
 
#define MXC_F_SPIMSS_DMA_RX_FIFO_CNT_POS   24
 
#define MXC_F_SPIMSS_DMA_RX_FIFO_CNT   ((uint32_t)(0xFUL << MXC_F_SPIMSS_DMA_RX_FIFO_CNT_POS))
 
#define MXC_F_SPIMSS_DMA_RX_DMA_EN_POS   31
 
#define MXC_F_SPIMSS_DMA_RX_DMA_EN   ((uint32_t)(0x1UL << MXC_F_SPIMSS_DMA_RX_DMA_EN_POS))
 
#define MXC_V_SPIMSS_DMA_RX_DMA_EN_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_DMA_RX_DMA_EN_DIS   (MXC_V_SPIMSS_DMA_RX_DMA_EN_DIS << MXC_F_SPIMSS_DMA_RX_DMA_EN_POS)
 
#define MXC_V_SPIMSS_DMA_RX_DMA_EN_EN   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_DMA_RX_DMA_EN_EN   (MXC_V_SPIMSS_DMA_RX_DMA_EN_EN << MXC_F_SPIMSS_DMA_RX_DMA_EN_POS)
 
#define MXC_F_SPIMSS_I2S_CTRL_I2S_EN_POS   0
 
#define MXC_F_SPIMSS_I2S_CTRL_I2S_EN   ((uint32_t)(0x1UL << MXC_F_SPIMSS_I2S_CTRL_I2S_EN_POS))
 
#define MXC_V_SPIMSS_I2S_CTRL_I2S_EN_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_I2S_CTRL_I2S_EN_DIS   (MXC_V_SPIMSS_I2S_CTRL_I2S_EN_DIS << MXC_F_SPIMSS_I2S_CTRL_I2S_EN_POS)
 
#define MXC_V_SPIMSS_I2S_CTRL_I2S_EN_EN   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_I2S_CTRL_I2S_EN_EN   (MXC_V_SPIMSS_I2S_CTRL_I2S_EN_EN << MXC_F_SPIMSS_I2S_CTRL_I2S_EN_POS)
 
#define MXC_F_SPIMSS_I2S_CTRL_I2S_MUTE_POS   1
 
#define MXC_F_SPIMSS_I2S_CTRL_I2S_MUTE   ((uint32_t)(0x1UL << MXC_F_SPIMSS_I2S_CTRL_I2S_MUTE_POS))
 
#define MXC_V_SPIMSS_I2S_CTRL_I2S_MUTE_NORMAL   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_I2S_CTRL_I2S_MUTE_NORMAL   (MXC_V_SPIMSS_I2S_CTRL_I2S_MUTE_NORMAL << MXC_F_SPIMSS_I2S_CTRL_I2S_MUTE_POS)
 
#define MXC_V_SPIMSS_I2S_CTRL_I2S_MUTE_MUTED   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_I2S_CTRL_I2S_MUTE_MUTED   (MXC_V_SPIMSS_I2S_CTRL_I2S_MUTE_MUTED << MXC_F_SPIMSS_I2S_CTRL_I2S_MUTE_POS)
 
#define MXC_F_SPIMSS_I2S_CTRL_I2S_PAUSE_POS   2
 
#define MXC_F_SPIMSS_I2S_CTRL_I2S_PAUSE   ((uint32_t)(0x1UL << MXC_F_SPIMSS_I2S_CTRL_I2S_PAUSE_POS))
 
#define MXC_V_SPIMSS_I2S_CTRL_I2S_PAUSE_NORMAL   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_I2S_CTRL_I2S_PAUSE_NORMAL   (MXC_V_SPIMSS_I2S_CTRL_I2S_PAUSE_NORMAL << MXC_F_SPIMSS_I2S_CTRL_I2S_PAUSE_POS)
 
#define MXC_V_SPIMSS_I2S_CTRL_I2S_PAUSE_PAUSE   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_I2S_CTRL_I2S_PAUSE_PAUSE   (MXC_V_SPIMSS_I2S_CTRL_I2S_PAUSE_PAUSE << MXC_F_SPIMSS_I2S_CTRL_I2S_PAUSE_POS)
 
#define MXC_F_SPIMSS_I2S_CTRL_I2S_MONO_POS   3
 
#define MXC_F_SPIMSS_I2S_CTRL_I2S_MONO   ((uint32_t)(0x1UL << MXC_F_SPIMSS_I2S_CTRL_I2S_MONO_POS))
 
#define MXC_V_SPIMSS_I2S_CTRL_I2S_MONO_STEREO   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_I2S_CTRL_I2S_MONO_STEREO   (MXC_V_SPIMSS_I2S_CTRL_I2S_MONO_STEREO << MXC_F_SPIMSS_I2S_CTRL_I2S_MONO_POS)
 
#define MXC_V_SPIMSS_I2S_CTRL_I2S_MONO_MONO   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_I2S_CTRL_I2S_MONO_MONO   (MXC_V_SPIMSS_I2S_CTRL_I2S_MONO_MONO << MXC_F_SPIMSS_I2S_CTRL_I2S_MONO_POS)
 
#define MXC_F_SPIMSS_I2S_CTRL_I2S_LJ_POS   4
 
#define MXC_F_SPIMSS_I2S_CTRL_I2S_LJ   ((uint32_t)(0x1UL << MXC_F_SPIMSS_I2S_CTRL_I2S_LJ_POS))
 
#define MXC_V_SPIMSS_I2S_CTRL_I2S_LJ_LAG   ((uint32_t)0x0UL)
 
#define MXC_S_SPIMSS_I2S_CTRL_I2S_LJ_LAG   (MXC_V_SPIMSS_I2S_CTRL_I2S_LJ_LAG << MXC_F_SPIMSS_I2S_CTRL_I2S_LJ_POS)
 
#define MXC_V_SPIMSS_I2S_CTRL_I2S_LJ_SYNCRONIZED   ((uint32_t)0x1UL)
 
#define MXC_S_SPIMSS_I2S_CTRL_I2S_LJ_SYNCRONIZED   (MXC_V_SPIMSS_I2S_CTRL_I2S_LJ_SYNCRONIZED << MXC_F_SPIMSS_I2S_CTRL_I2S_LJ_POS)
 

Detailed Description

Registers, Bit Masks and Bit Positions for the SPIMSS Peripheral Module.

Note
This file is @generated.