AES_INTFL

Macros
#define	MXC_F_AES_INTFL_DONE_POS   0
#define	MXC_F_AES_INTFL_DONE   ((uint32_t)(0x1UL << MXC_F_AES_INTFL_DONE_POS))
#define	MXC_F_AES_INTFL_KEY_CHANGE_POS   1
#define	MXC_F_AES_INTFL_KEY_CHANGE   ((uint32_t)(0x1UL << MXC_F_AES_INTFL_KEY_CHANGE_POS))
#define	MXC_F_AES_INTFL_KEY_ZERO_POS   2
#define	MXC_F_AES_INTFL_KEY_ZERO   ((uint32_t)(0x1UL << MXC_F_AES_INTFL_KEY_ZERO_POS))
#define	MXC_F_AES_INTFL_OV_POS   3
#define	MXC_F_AES_INTFL_OV   ((uint32_t)(0x1UL << MXC_F_AES_INTFL_OV_POS))
#define	MXC_F_AES_INTFL_KEY_ONE_POS   4
#define	MXC_F_AES_INTFL_KEY_ONE   ((uint32_t)(0x1UL << MXC_F_AES_INTFL_KEY_ONE_POS))

Detailed Description

AES Interrupt Flag Register.

Macro Definition Documentation

MXC_F_AES_INTFL_DONE

#define MXC_F_AES_INTFL_DONE   ((uint32_t)(0x1UL << MXC_F_AES_INTFL_DONE_POS))

INTFL_DONE Mask

MXC_F_AES_INTFL_DONE_POS

#define MXC_F_AES_INTFL_DONE_POS   0

INTFL_DONE Position

MXC_F_AES_INTFL_KEY_CHANGE

#define MXC_F_AES_INTFL_KEY_CHANGE   ((uint32_t)(0x1UL << MXC_F_AES_INTFL_KEY_CHANGE_POS))

INTFL_KEY_CHANGE Mask

MXC_F_AES_INTFL_KEY_CHANGE_POS

#define MXC_F_AES_INTFL_KEY_CHANGE_POS   1

INTFL_KEY_CHANGE Position

MXC_F_AES_INTFL_KEY_ONE

#define MXC_F_AES_INTFL_KEY_ONE   ((uint32_t)(0x1UL << MXC_F_AES_INTFL_KEY_ONE_POS))

INTFL_KEY_ONE Mask

MXC_F_AES_INTFL_KEY_ONE_POS

#define MXC_F_AES_INTFL_KEY_ONE_POS   4

INTFL_KEY_ONE Position

MXC_F_AES_INTFL_KEY_ZERO

#define MXC_F_AES_INTFL_KEY_ZERO   ((uint32_t)(0x1UL << MXC_F_AES_INTFL_KEY_ZERO_POS))

INTFL_KEY_ZERO Mask

MXC_F_AES_INTFL_KEY_ZERO_POS

#define MXC_F_AES_INTFL_KEY_ZERO_POS   2

INTFL_KEY_ZERO Position

MXC_F_AES_INTFL_OV

#define MXC_F_AES_INTFL_OV   ((uint32_t)(0x1UL << MXC_F_AES_INTFL_OV_POS))

INTFL_OV Mask

MXC_F_AES_INTFL_OV_POS

#define MXC_F_AES_INTFL_OV_POS   3

INTFL_OV Position