Register Offsets

Macros
#define	MXC_R_DVS_CTL   ((uint32_t)0x00000000UL)
#define	MXC_R_DVS_STAT   ((uint32_t)0x00000004UL)
#define	MXC_R_DVS_DIRECT   ((uint32_t)0x00000008UL)
#define	MXC_R_DVS_MON   ((uint32_t)0x0000000CUL)
#define	MXC_R_DVS_ADJ_UP   ((uint32_t)0x00000010UL)
#define	MXC_R_DVS_ADJ_DWN   ((uint32_t)0x00000014UL)
#define	MXC_R_DVS_THRES_CMP   ((uint32_t)0x00000018UL)
#define	MXC_R_DVS_TAP_SEL   ((uint32_t)0x0000001CUL)

Detailed Description

DVS Peripheral Register Offsets from the DVS Base Peripheral Address.

Macro Definition Documentation

MXC_R_DVS_ADJ_DWN

#define MXC_R_DVS_ADJ_DWN   ((uint32_t)0x00000014UL)

Offset from DVS Base Address: 0x0014

MXC_R_DVS_ADJ_UP

#define MXC_R_DVS_ADJ_UP   ((uint32_t)0x00000010UL)

Offset from DVS Base Address: 0x0010

MXC_R_DVS_CTL

#define MXC_R_DVS_CTL   ((uint32_t)0x00000000UL)

Offset from DVS Base Address: 0x0000

MXC_R_DVS_DIRECT

#define MXC_R_DVS_DIRECT   ((uint32_t)0x00000008UL)

Offset from DVS Base Address: 0x0008

MXC_R_DVS_MON

#define MXC_R_DVS_MON   ((uint32_t)0x0000000CUL)

Offset from DVS Base Address: 0x000C

MXC_R_DVS_STAT

#define MXC_R_DVS_STAT   ((uint32_t)0x00000004UL)

Offset from DVS Base Address: 0x0004

MXC_R_DVS_TAP_SEL

#define MXC_R_DVS_TAP_SEL   ((uint32_t)0x0000001CUL)

Offset from DVS Base Address: 0x001C

MXC_R_DVS_THRES_CMP

#define MXC_R_DVS_THRES_CMP   ((uint32_t)0x00000018UL)

Offset from DVS Base Address: 0x0018