Macros
#define	MXC_R_GPIO_EN0 ((uint32_t)0x00000000UL)

#define	MXC_R_GPIO_EN0_SET ((uint32_t)0x00000004UL)

#define	MXC_R_GPIO_EN0_CLR ((uint32_t)0x00000008UL)

#define	MXC_R_GPIO_OUTEN ((uint32_t)0x0000000CUL)

#define	MXC_R_GPIO_OUTEN_SET ((uint32_t)0x00000010UL)

#define	MXC_R_GPIO_OUTEN_CLR ((uint32_t)0x00000014UL)

#define	MXC_R_GPIO_OUT ((uint32_t)0x00000018UL)

#define	MXC_R_GPIO_OUT_SET ((uint32_t)0x0000001CUL)

#define	MXC_R_GPIO_OUT_CLR ((uint32_t)0x00000020UL)

#define	MXC_R_GPIO_IN ((uint32_t)0x00000024UL)

#define	MXC_R_GPIO_INTMODE ((uint32_t)0x00000028UL)

#define	MXC_R_GPIO_INTPOL ((uint32_t)0x0000002CUL)

#define	MXC_R_GPIO_INEN ((uint32_t)0x00000030UL)

#define	MXC_R_GPIO_INTEN ((uint32_t)0x00000034UL)

#define	MXC_R_GPIO_INTEN_SET ((uint32_t)0x00000038UL)

#define	MXC_R_GPIO_INTEN_CLR ((uint32_t)0x0000003CUL)

#define	MXC_R_GPIO_INTFL ((uint32_t)0x00000040UL)

#define	MXC_R_GPIO_INTFL_CLR ((uint32_t)0x00000048UL)

#define	MXC_R_GPIO_WKEN ((uint32_t)0x0000004CUL)

#define	MXC_R_GPIO_WKEN_SET ((uint32_t)0x00000050UL)

#define	MXC_R_GPIO_WKEN_CLR ((uint32_t)0x00000054UL)

#define	MXC_R_GPIO_DUALEDGE ((uint32_t)0x0000005CUL)

#define	MXC_R_GPIO_PADCTRL0 ((uint32_t)0x00000060UL)

#define	MXC_R_GPIO_PADCTRL1 ((uint32_t)0x00000064UL)

#define	MXC_R_GPIO_EN1 ((uint32_t)0x00000068UL)

#define	MXC_R_GPIO_EN1_SET ((uint32_t)0x0000006CUL)

#define	MXC_R_GPIO_EN1_CLR ((uint32_t)0x00000070UL)

#define	MXC_R_GPIO_EN2 ((uint32_t)0x00000074UL)

#define	MXC_R_GPIO_EN2_SET ((uint32_t)0x00000078UL)

#define	MXC_R_GPIO_EN2_CLR ((uint32_t)0x0000007CUL)

#define	MXC_R_GPIO_HYSEN ((uint32_t)0x000000A8UL)

#define	MXC_R_GPIO_SRSEL ((uint32_t)0x000000ACUL)

#define	MXC_R_GPIO_DS0 ((uint32_t)0x000000B0UL)

#define	MXC_R_GPIO_DS1 ((uint32_t)0x000000B4UL)

#define	MXC_R_GPIO_PS ((uint32_t)0x000000B8UL)

#define	MXC_R_GPIO_VSSEL ((uint32_t)0x000000C0UL)

Detailed Description

GPIO Peripheral Register Offsets from the GPIO Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_GPIO_DS0

#define MXC_R_GPIO_DS0 ((uint32_t)0x000000B0UL)

Offset from GPIO Base Address: 0x00B0

◆ MXC_R_GPIO_DS1

#define MXC_R_GPIO_DS1 ((uint32_t)0x000000B4UL)

Offset from GPIO Base Address: 0x00B4

◆ MXC_R_GPIO_DUALEDGE

#define MXC_R_GPIO_DUALEDGE ((uint32_t)0x0000005CUL)

Offset from GPIO Base Address: 0x005C

◆ MXC_R_GPIO_EN0

#define MXC_R_GPIO_EN0 ((uint32_t)0x00000000UL)

Offset from GPIO Base Address: 0x0000

◆ MXC_R_GPIO_EN0_CLR

#define MXC_R_GPIO_EN0_CLR ((uint32_t)0x00000008UL)

Offset from GPIO Base Address: 0x0008

◆ MXC_R_GPIO_EN0_SET

#define MXC_R_GPIO_EN0_SET ((uint32_t)0x00000004UL)

Offset from GPIO Base Address: 0x0004

◆ MXC_R_GPIO_EN1

#define MXC_R_GPIO_EN1 ((uint32_t)0x00000068UL)

Offset from GPIO Base Address: 0x0068

◆ MXC_R_GPIO_EN1_CLR

#define MXC_R_GPIO_EN1_CLR ((uint32_t)0x00000070UL)

Offset from GPIO Base Address: 0x0070

◆ MXC_R_GPIO_EN1_SET

#define MXC_R_GPIO_EN1_SET ((uint32_t)0x0000006CUL)

Offset from GPIO Base Address: 0x006C

◆ MXC_R_GPIO_EN2

#define MXC_R_GPIO_EN2 ((uint32_t)0x00000074UL)

Offset from GPIO Base Address: 0x0074

◆ MXC_R_GPIO_EN2_CLR

#define MXC_R_GPIO_EN2_CLR ((uint32_t)0x0000007CUL)

Offset from GPIO Base Address: 0x007C

◆ MXC_R_GPIO_EN2_SET

#define MXC_R_GPIO_EN2_SET ((uint32_t)0x00000078UL)

Offset from GPIO Base Address: 0x0078

◆ MXC_R_GPIO_HYSEN

#define MXC_R_GPIO_HYSEN ((uint32_t)0x000000A8UL)

Offset from GPIO Base Address: 0x00A8

◆ MXC_R_GPIO_IN

#define MXC_R_GPIO_IN ((uint32_t)0x00000024UL)

Offset from GPIO Base Address: 0x0024

◆ MXC_R_GPIO_INEN

#define MXC_R_GPIO_INEN ((uint32_t)0x00000030UL)

Offset from GPIO Base Address: 0x0030

◆ MXC_R_GPIO_INTEN

#define MXC_R_GPIO_INTEN ((uint32_t)0x00000034UL)

Offset from GPIO Base Address: 0x0034

◆ MXC_R_GPIO_INTEN_CLR

#define MXC_R_GPIO_INTEN_CLR ((uint32_t)0x0000003CUL)

Offset from GPIO Base Address: 0x003C

◆ MXC_R_GPIO_INTEN_SET

#define MXC_R_GPIO_INTEN_SET ((uint32_t)0x00000038UL)

Offset from GPIO Base Address: 0x0038

◆ MXC_R_GPIO_INTFL

#define MXC_R_GPIO_INTFL ((uint32_t)0x00000040UL)

Offset from GPIO Base Address: 0x0040

◆ MXC_R_GPIO_INTFL_CLR

#define MXC_R_GPIO_INTFL_CLR ((uint32_t)0x00000048UL)

Offset from GPIO Base Address: 0x0048

◆ MXC_R_GPIO_INTMODE

#define MXC_R_GPIO_INTMODE ((uint32_t)0x00000028UL)

Offset from GPIO Base Address: 0x0028

◆ MXC_R_GPIO_INTPOL

#define MXC_R_GPIO_INTPOL ((uint32_t)0x0000002CUL)

Offset from GPIO Base Address: 0x002C

◆ MXC_R_GPIO_OUT

#define MXC_R_GPIO_OUT ((uint32_t)0x00000018UL)

Offset from GPIO Base Address: 0x0018

◆ MXC_R_GPIO_OUT_CLR

#define MXC_R_GPIO_OUT_CLR ((uint32_t)0x00000020UL)

Offset from GPIO Base Address: 0x0020

◆ MXC_R_GPIO_OUT_SET

#define MXC_R_GPIO_OUT_SET ((uint32_t)0x0000001CUL)

Offset from GPIO Base Address: 0x001C

◆ MXC_R_GPIO_OUTEN

#define MXC_R_GPIO_OUTEN ((uint32_t)0x0000000CUL)

Offset from GPIO Base Address: 0x000C

◆ MXC_R_GPIO_OUTEN_CLR

#define MXC_R_GPIO_OUTEN_CLR ((uint32_t)0x00000014UL)

Offset from GPIO Base Address: 0x0014

◆ MXC_R_GPIO_OUTEN_SET

#define MXC_R_GPIO_OUTEN_SET ((uint32_t)0x00000010UL)

Offset from GPIO Base Address: 0x0010

◆ MXC_R_GPIO_PADCTRL0

#define MXC_R_GPIO_PADCTRL0 ((uint32_t)0x00000060UL)

Offset from GPIO Base Address: 0x0060

◆ MXC_R_GPIO_PADCTRL1

#define MXC_R_GPIO_PADCTRL1 ((uint32_t)0x00000064UL)

Offset from GPIO Base Address: 0x0064

◆ MXC_R_GPIO_PS

#define MXC_R_GPIO_PS ((uint32_t)0x000000B8UL)

Offset from GPIO Base Address: 0x00B8

◆ MXC_R_GPIO_SRSEL

#define MXC_R_GPIO_SRSEL ((uint32_t)0x000000ACUL)

Offset from GPIO Base Address: 0x00AC

◆ MXC_R_GPIO_VSSEL

#define MXC_R_GPIO_VSSEL ((uint32_t)0x000000C0UL)

Offset from GPIO Base Address: 0x00C0

◆ MXC_R_GPIO_WKEN

#define MXC_R_GPIO_WKEN ((uint32_t)0x0000004CUL)

Offset from GPIO Base Address: 0x004C

◆ MXC_R_GPIO_WKEN_CLR

#define MXC_R_GPIO_WKEN_CLR ((uint32_t)0x00000054UL)

Offset from GPIO Base Address: 0x0054

◆ MXC_R_GPIO_WKEN_SET

#define MXC_R_GPIO_WKEN_SET ((uint32_t)0x00000050UL)

Offset from GPIO Base Address: 0x0050

Macros