Macros
#define	MXC_R_I2C_CTRL ((uint32_t)0x00000000UL)

#define	MXC_R_I2C_STATUS ((uint32_t)0x00000004UL)

#define	MXC_R_I2C_INTFL0 ((uint32_t)0x00000008UL)

#define	MXC_R_I2C_INTEN0 ((uint32_t)0x0000000CUL)

#define	MXC_R_I2C_INTFL1 ((uint32_t)0x00000010UL)

#define	MXC_R_I2C_INTEN1 ((uint32_t)0x00000014UL)

#define	MXC_R_I2C_FIFOLEN ((uint32_t)0x00000018UL)

#define	MXC_R_I2C_RXCTRL0 ((uint32_t)0x0000001CUL)

#define	MXC_R_I2C_RXCTRL1 ((uint32_t)0x00000020UL)

#define	MXC_R_I2C_TXCTRL0 ((uint32_t)0x00000024UL)

#define	MXC_R_I2C_TXCTRL1 ((uint32_t)0x00000028UL)

#define	MXC_R_I2C_FIFO ((uint32_t)0x0000002CUL)

#define	MXC_R_I2C_MSTCTRL ((uint32_t)0x00000030UL)

#define	MXC_R_I2C_CLKLO ((uint32_t)0x00000034UL)

#define	MXC_R_I2C_CLKHI ((uint32_t)0x00000038UL)

#define	MXC_R_I2C_HSCLK ((uint32_t)0x0000003CUL)

#define	MXC_R_I2C_TIMEOUT ((uint32_t)0x00000040UL)

#define	MXC_R_I2C_DMA ((uint32_t)0x00000048UL)

#define	MXC_R_I2C_SLAVE_MULTI ((uint32_t)0x0000004CUL)

#define	MXC_R_I2C_SLAVE0 ((uint32_t)0x0000004CUL)

#define	MXC_R_I2C_SLAVE1 ((uint32_t)0x00000050UL)

#define	MXC_R_I2C_SLAVE2 ((uint32_t)0x00000054UL)

#define	MXC_R_I2C_SLAVE3 ((uint32_t)0x00000058UL)

Detailed Description

I2C Peripheral Register Offsets from the I2C Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_I2C_CLKHI

#define MXC_R_I2C_CLKHI ((uint32_t)0x00000038UL)

Offset from I2C Base Address: 0x0038

◆ MXC_R_I2C_CLKLO

#define MXC_R_I2C_CLKLO ((uint32_t)0x00000034UL)

Offset from I2C Base Address: 0x0034

◆ MXC_R_I2C_CTRL

#define MXC_R_I2C_CTRL ((uint32_t)0x00000000UL)

Offset from I2C Base Address: 0x0000

◆ MXC_R_I2C_DMA

#define MXC_R_I2C_DMA ((uint32_t)0x00000048UL)

Offset from I2C Base Address: 0x0048

◆ MXC_R_I2C_FIFO

#define MXC_R_I2C_FIFO ((uint32_t)0x0000002CUL)

Offset from I2C Base Address: 0x002C

◆ MXC_R_I2C_FIFOLEN

#define MXC_R_I2C_FIFOLEN ((uint32_t)0x00000018UL)

Offset from I2C Base Address: 0x0018

◆ MXC_R_I2C_HSCLK

#define MXC_R_I2C_HSCLK ((uint32_t)0x0000003CUL)

Offset from I2C Base Address: 0x003C

◆ MXC_R_I2C_INTEN0

#define MXC_R_I2C_INTEN0 ((uint32_t)0x0000000CUL)

Offset from I2C Base Address: 0x000C

◆ MXC_R_I2C_INTEN1

#define MXC_R_I2C_INTEN1 ((uint32_t)0x00000014UL)

Offset from I2C Base Address: 0x0014

◆ MXC_R_I2C_INTFL0

#define MXC_R_I2C_INTFL0 ((uint32_t)0x00000008UL)

Offset from I2C Base Address: 0x0008

◆ MXC_R_I2C_INTFL1

#define MXC_R_I2C_INTFL1 ((uint32_t)0x00000010UL)

Offset from I2C Base Address: 0x0010

◆ MXC_R_I2C_MSTCTRL

#define MXC_R_I2C_MSTCTRL ((uint32_t)0x00000030UL)

Offset from I2C Base Address: 0x0030

◆ MXC_R_I2C_RXCTRL0

#define MXC_R_I2C_RXCTRL0 ((uint32_t)0x0000001CUL)

Offset from I2C Base Address: 0x001C

◆ MXC_R_I2C_RXCTRL1

#define MXC_R_I2C_RXCTRL1 ((uint32_t)0x00000020UL)

Offset from I2C Base Address: 0x0020

◆ MXC_R_I2C_SLAVE0

#define MXC_R_I2C_SLAVE0 ((uint32_t)0x0000004CUL)

Offset from I2C Base Address: 0x004C

◆ MXC_R_I2C_SLAVE1

#define MXC_R_I2C_SLAVE1 ((uint32_t)0x00000050UL)

Offset from I2C Base Address: 0x0050

◆ MXC_R_I2C_SLAVE2

#define MXC_R_I2C_SLAVE2 ((uint32_t)0x00000054UL)

Offset from I2C Base Address: 0x0054

◆ MXC_R_I2C_SLAVE3

#define MXC_R_I2C_SLAVE3 ((uint32_t)0x00000058UL)

Offset from I2C Base Address: 0x0058

◆ MXC_R_I2C_SLAVE_MULTI

#define MXC_R_I2C_SLAVE_MULTI ((uint32_t)0x0000004CUL)

Offset from I2C Base Address: 0x004C

◆ MXC_R_I2C_STATUS

#define MXC_R_I2C_STATUS ((uint32_t)0x00000004UL)

Offset from I2C Base Address: 0x0004

◆ MXC_R_I2C_TIMEOUT

#define MXC_R_I2C_TIMEOUT ((uint32_t)0x00000040UL)

Offset from I2C Base Address: 0x0040

◆ MXC_R_I2C_TXCTRL0

#define MXC_R_I2C_TXCTRL0 ((uint32_t)0x00000024UL)

Offset from I2C Base Address: 0x0024

◆ MXC_R_I2C_TXCTRL1

#define MXC_R_I2C_TXCTRL1 ((uint32_t)0x00000028UL)

Offset from I2C Base Address: 0x0028

Macros