Register Offsets

Macros
#define	MXC_R_I2S_CTRL0CH0   ((uint32_t)0x00000000UL)
#define	MXC_R_I2S_CTRL1CH0   ((uint32_t)0x00000010UL)
#define	MXC_R_I2S_FILTCH0   ((uint32_t)0x00000020UL)
#define	MXC_R_I2S_DMACH0   ((uint32_t)0x00000030UL)
#define	MXC_R_I2S_FIFOCH0   ((uint32_t)0x00000040UL)
#define	MXC_R_I2S_INTFL   ((uint32_t)0x00000050UL)
#define	MXC_R_I2S_INTEN   ((uint32_t)0x00000054UL)
#define	MXC_R_I2S_EXTSETUP   ((uint32_t)0x00000058UL)
#define	MXC_R_I2S_WKEN   ((uint32_t)0x0000005CUL)
#define	MXC_R_I2S_WKFL   ((uint32_t)0x00000060UL)

Detailed Description

I2S Peripheral Register Offsets from the I2S Base Peripheral Address.

Macro Definition Documentation

MXC_R_I2S_CTRL0CH0

#define MXC_R_I2S_CTRL0CH0   ((uint32_t)0x00000000UL)

Offset from I2S Base Address: 0x0000

MXC_R_I2S_CTRL1CH0

#define MXC_R_I2S_CTRL1CH0   ((uint32_t)0x00000010UL)

Offset from I2S Base Address: 0x0010

MXC_R_I2S_DMACH0

#define MXC_R_I2S_DMACH0   ((uint32_t)0x00000030UL)

Offset from I2S Base Address: 0x0030

MXC_R_I2S_EXTSETUP

#define MXC_R_I2S_EXTSETUP   ((uint32_t)0x00000058UL)

Offset from I2S Base Address: 0x0058

MXC_R_I2S_FIFOCH0

#define MXC_R_I2S_FIFOCH0   ((uint32_t)0x00000040UL)

Offset from I2S Base Address: 0x0040

MXC_R_I2S_FILTCH0

#define MXC_R_I2S_FILTCH0   ((uint32_t)0x00000020UL)

Offset from I2S Base Address: 0x0020

MXC_R_I2S_INTEN

#define MXC_R_I2S_INTEN   ((uint32_t)0x00000054UL)

Offset from I2S Base Address: 0x0054

MXC_R_I2S_INTFL

#define MXC_R_I2S_INTFL   ((uint32_t)0x00000050UL)

Offset from I2S Base Address: 0x0050

MXC_R_I2S_WKEN

#define MXC_R_I2S_WKEN   ((uint32_t)0x0000005CUL)

Offset from I2S Base Address: 0x005C

MXC_R_I2S_WKFL

#define MXC_R_I2S_WKFL   ((uint32_t)0x00000060UL)

Offset from I2S Base Address: 0x0060