RTC_SSECA

Macros
#define	MXC_F_RTC_SSECA_SSEC_ALARM_POS   0
#define	MXC_F_RTC_SSECA_SSEC_ALARM   ((uint32_t)(0xFFFFFFFFUL << MXC_F_RTC_SSECA_SSEC_ALARM_POS))

Detailed Description

RTC sub-second alarm. This register contains the reload value for the sub- second alarm.

Macro Definition Documentation

MXC_F_RTC_SSECA_SSEC_ALARM

#define MXC_F_RTC_SSECA_SSEC_ALARM   ((uint32_t)(0xFFFFFFFFUL << MXC_F_RTC_SSECA_SSEC_ALARM_POS))

SSECA_SSEC_ALARM Mask

MXC_F_RTC_SSECA_SSEC_ALARM_POS

#define MXC_F_RTC_SSECA_SSEC_ALARM_POS   0

SSECA_SSEC_ALARM Position