Register Offsets

Macros
#define	MXC_R_SIMO_VREGO_A   ((uint32_t)0x00000004UL)
#define	MXC_R_SIMO_VREGO_B   ((uint32_t)0x00000008UL)
#define	MXC_R_SIMO_VREGO_C   ((uint32_t)0x0000000CUL)
#define	MXC_R_SIMO_VREGO_D   ((uint32_t)0x00000010UL)
#define	MXC_R_SIMO_IPKA   ((uint32_t)0x00000014UL)
#define	MXC_R_SIMO_IPKB   ((uint32_t)0x00000018UL)
#define	MXC_R_SIMO_MAXTON   ((uint32_t)0x0000001CUL)
#define	MXC_R_SIMO_ILOAD_A   ((uint32_t)0x00000020UL)
#define	MXC_R_SIMO_ILOAD_B   ((uint32_t)0x00000024UL)
#define	MXC_R_SIMO_ILOAD_C   ((uint32_t)0x00000028UL)
#define	MXC_R_SIMO_ILOAD_D   ((uint32_t)0x0000002CUL)
#define	MXC_R_SIMO_BUCK_ALERT_THR_A   ((uint32_t)0x00000030UL)
#define	MXC_R_SIMO_BUCK_ALERT_THR_B   ((uint32_t)0x00000034UL)
#define	MXC_R_SIMO_BUCK_ALERT_THR_C   ((uint32_t)0x00000038UL)
#define	MXC_R_SIMO_BUCK_ALERT_THR_D   ((uint32_t)0x0000003CUL)
#define	MXC_R_SIMO_BUCK_OUT_READY   ((uint32_t)0x00000040UL)
#define	MXC_R_SIMO_ZERO_CROSS_CAL_A   ((uint32_t)0x00000044UL)
#define	MXC_R_SIMO_ZERO_CROSS_CAL_B   ((uint32_t)0x00000048UL)
#define	MXC_R_SIMO_ZERO_CROSS_CAL_C   ((uint32_t)0x0000004CUL)
#define	MXC_R_SIMO_ZERO_CROSS_CAL_D   ((uint32_t)0x00000050UL)

Detailed Description

SIMO Peripheral Register Offsets from the SIMO Base Peripheral Address.

Macro Definition Documentation

MXC_R_SIMO_BUCK_ALERT_THR_A

#define MXC_R_SIMO_BUCK_ALERT_THR_A   ((uint32_t)0x00000030UL)

Offset from SIMO Base Address: 0x0030

MXC_R_SIMO_BUCK_ALERT_THR_B

#define MXC_R_SIMO_BUCK_ALERT_THR_B   ((uint32_t)0x00000034UL)

Offset from SIMO Base Address: 0x0034

MXC_R_SIMO_BUCK_ALERT_THR_C

#define MXC_R_SIMO_BUCK_ALERT_THR_C   ((uint32_t)0x00000038UL)

Offset from SIMO Base Address: 0x0038

MXC_R_SIMO_BUCK_ALERT_THR_D

#define MXC_R_SIMO_BUCK_ALERT_THR_D   ((uint32_t)0x0000003CUL)

Offset from SIMO Base Address: 0x003C

MXC_R_SIMO_BUCK_OUT_READY

#define MXC_R_SIMO_BUCK_OUT_READY   ((uint32_t)0x00000040UL)

Offset from SIMO Base Address: 0x0040

MXC_R_SIMO_ILOAD_A

#define MXC_R_SIMO_ILOAD_A   ((uint32_t)0x00000020UL)

Offset from SIMO Base Address: 0x0020

MXC_R_SIMO_ILOAD_B

#define MXC_R_SIMO_ILOAD_B   ((uint32_t)0x00000024UL)

Offset from SIMO Base Address: 0x0024

MXC_R_SIMO_ILOAD_C

#define MXC_R_SIMO_ILOAD_C   ((uint32_t)0x00000028UL)

Offset from SIMO Base Address: 0x0028

MXC_R_SIMO_ILOAD_D

#define MXC_R_SIMO_ILOAD_D   ((uint32_t)0x0000002CUL)

Offset from SIMO Base Address: 0x002C

MXC_R_SIMO_IPKA

#define MXC_R_SIMO_IPKA   ((uint32_t)0x00000014UL)

Offset from SIMO Base Address: 0x0014

MXC_R_SIMO_IPKB

#define MXC_R_SIMO_IPKB   ((uint32_t)0x00000018UL)

Offset from SIMO Base Address: 0x0018

MXC_R_SIMO_MAXTON

#define MXC_R_SIMO_MAXTON   ((uint32_t)0x0000001CUL)

Offset from SIMO Base Address: 0x001C

MXC_R_SIMO_VREGO_A

#define MXC_R_SIMO_VREGO_A   ((uint32_t)0x00000004UL)

Offset from SIMO Base Address: 0x0004

MXC_R_SIMO_VREGO_B

#define MXC_R_SIMO_VREGO_B   ((uint32_t)0x00000008UL)

Offset from SIMO Base Address: 0x0008

MXC_R_SIMO_VREGO_C

#define MXC_R_SIMO_VREGO_C   ((uint32_t)0x0000000CUL)

Offset from SIMO Base Address: 0x000C

MXC_R_SIMO_VREGO_D

#define MXC_R_SIMO_VREGO_D   ((uint32_t)0x00000010UL)

Offset from SIMO Base Address: 0x0010

MXC_R_SIMO_ZERO_CROSS_CAL_A

#define MXC_R_SIMO_ZERO_CROSS_CAL_A   ((uint32_t)0x00000044UL)

Offset from SIMO Base Address: 0x0044

MXC_R_SIMO_ZERO_CROSS_CAL_B

#define MXC_R_SIMO_ZERO_CROSS_CAL_B   ((uint32_t)0x00000048UL)

Offset from SIMO Base Address: 0x0048

MXC_R_SIMO_ZERO_CROSS_CAL_C

#define MXC_R_SIMO_ZERO_CROSS_CAL_C   ((uint32_t)0x0000004CUL)

Offset from SIMO Base Address: 0x004C

MXC_R_SIMO_ZERO_CROSS_CAL_D

#define MXC_R_SIMO_ZERO_CROSS_CAL_D   ((uint32_t)0x00000050UL)

Offset from SIMO Base Address: 0x0050