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MAX32655 Peripheral Driver API
Peripheral Driver API for the MAX32655
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Macros | |
| #define | MXC_R_UART_CTRL ((uint32_t)0x00000000UL) |
| #define | MXC_R_UART_STATUS ((uint32_t)0x00000004UL) |
| #define | MXC_R_UART_INT_EN ((uint32_t)0x00000008UL) |
| #define | MXC_R_UART_INT_FL ((uint32_t)0x0000000CUL) |
| #define | MXC_R_UART_CLKDIV ((uint32_t)0x00000010UL) |
| #define | MXC_R_UART_OSR ((uint32_t)0x00000014UL) |
| #define | MXC_R_UART_TXPEEK ((uint32_t)0x00000018UL) |
| #define | MXC_R_UART_PNR ((uint32_t)0x0000001CUL) |
| #define | MXC_R_UART_FIFO ((uint32_t)0x00000020UL) |
| #define | MXC_R_UART_DMA ((uint32_t)0x00000030UL) |
| #define | MXC_R_UART_WKEN ((uint32_t)0x00000034UL) |
| #define | MXC_R_UART_WKFL ((uint32_t)0x00000038UL) |
UART Peripheral Register Offsets from the UART Base Peripheral Address.
| #define MXC_R_UART_CLKDIV ((uint32_t)0x00000010UL) |
Offset from UART Base Address: 0x0010
| #define MXC_R_UART_CTRL ((uint32_t)0x00000000UL) |
Offset from UART Base Address: 0x0000
| #define MXC_R_UART_DMA ((uint32_t)0x00000030UL) |
Offset from UART Base Address: 0x0030
| #define MXC_R_UART_FIFO ((uint32_t)0x00000020UL) |
Offset from UART Base Address: 0x0020
| #define MXC_R_UART_INT_EN ((uint32_t)0x00000008UL) |
Offset from UART Base Address: 0x0008
| #define MXC_R_UART_INT_FL ((uint32_t)0x0000000CUL) |
Offset from UART Base Address: 0x000C
| #define MXC_R_UART_OSR ((uint32_t)0x00000014UL) |
Offset from UART Base Address: 0x0014
| #define MXC_R_UART_PNR ((uint32_t)0x0000001CUL) |
Offset from UART Base Address: 0x001C
| #define MXC_R_UART_STATUS ((uint32_t)0x00000004UL) |
Offset from UART Base Address: 0x0004
| #define MXC_R_UART_TXPEEK ((uint32_t)0x00000018UL) |
Offset from UART Base Address: 0x0018
| #define MXC_R_UART_WKEN ((uint32_t)0x00000034UL) |
Offset from UART Base Address: 0x0034
| #define MXC_R_UART_WKFL ((uint32_t)0x00000038UL) |
Offset from UART Base Address: 0x0038