Macros
#define	MXC_R_GCR_SCON ((uint32_t)0x00000000UL)

#define	MXC_R_GCR_RST0 ((uint32_t)0x00000004UL)

#define	MXC_R_GCR_CLK_CTRL ((uint32_t)0x00000008UL)

#define	MXC_R_GCR_PM ((uint32_t)0x0000000CUL)

#define	MXC_R_GCR_PCLK_DIS0 ((uint32_t)0x00000024UL)

#define	MXC_R_GCR_MEM_CTRL ((uint32_t)0x00000028UL)

#define	MXC_R_GCR_MEM_ZCTRL ((uint32_t)0x0000002CUL)

#define	MXC_R_GCR_SYS_STAT ((uint32_t)0x00000040UL)

#define	MXC_R_GCR_RST1 ((uint32_t)0x00000044UL)

#define	MXC_R_GCR_PCLK_DIS1 ((uint32_t)0x00000048UL)

#define	MXC_R_GCR_EVTEN ((uint32_t)0x0000004CUL)

#define	MXC_R_GCR_REV ((uint32_t)0x00000050UL)

#define	MXC_R_GCR_SYS_IE ((uint32_t)0x00000054UL)

Detailed Description

GCR Peripheral Register Offsets from the GCR Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_GCR_CLK_CTRL

#define MXC_R_GCR_CLK_CTRL ((uint32_t)0x00000008UL)

Offset from GCR Base Address: 0x0008

◆ MXC_R_GCR_EVTEN

#define MXC_R_GCR_EVTEN ((uint32_t)0x0000004CUL)

Offset from GCR Base Address: 0x004C

◆ MXC_R_GCR_MEM_CTRL

#define MXC_R_GCR_MEM_CTRL ((uint32_t)0x00000028UL)

Offset from GCR Base Address: 0x0028

◆ MXC_R_GCR_MEM_ZCTRL

#define MXC_R_GCR_MEM_ZCTRL ((uint32_t)0x0000002CUL)

Offset from GCR Base Address: 0x002C

◆ MXC_R_GCR_PCLK_DIS0

#define MXC_R_GCR_PCLK_DIS0 ((uint32_t)0x00000024UL)

Offset from GCR Base Address: 0x0024

◆ MXC_R_GCR_PCLK_DIS1

#define MXC_R_GCR_PCLK_DIS1 ((uint32_t)0x00000048UL)

Offset from GCR Base Address: 0x0048

◆ MXC_R_GCR_PM

#define MXC_R_GCR_PM ((uint32_t)0x0000000CUL)

Offset from GCR Base Address: 0x000C

◆ MXC_R_GCR_REV

#define MXC_R_GCR_REV ((uint32_t)0x00000050UL)

Offset from GCR Base Address: 0x0050

◆ MXC_R_GCR_RST0

#define MXC_R_GCR_RST0 ((uint32_t)0x00000004UL)

Offset from GCR Base Address: 0x0004

◆ MXC_R_GCR_RST1

#define MXC_R_GCR_RST1 ((uint32_t)0x00000044UL)

Offset from GCR Base Address: 0x0044

◆ MXC_R_GCR_SCON

#define MXC_R_GCR_SCON ((uint32_t)0x00000000UL)

Offset from GCR Base Address: 0x0000

◆ MXC_R_GCR_SYS_IE

#define MXC_R_GCR_SYS_IE ((uint32_t)0x00000054UL)

Offset from GCR Base Address: 0x0054

◆ MXC_R_GCR_SYS_STAT

#define MXC_R_GCR_SYS_STAT ((uint32_t)0x00000040UL)

Offset from GCR Base Address: 0x0040

Macros