Macros
#define	MXC_F_GPIO_DS0_ALL_POS 0

#define	MXC_F_GPIO_DS0_ALL ((uint32_t)(0xFFFFFFFFUL << MXC_F_GPIO_DS0_ALL_POS))

#define	MXC_V_GPIO_DS0_ALL_LD ((uint32_t)0x0UL)

#define	MXC_S_GPIO_DS0_ALL_LD (MXC_V_GPIO_DS0_ALL_LD << MXC_F_GPIO_DS0_ALL_POS)

#define	MXC_V_GPIO_DS0_ALL_HD ((uint32_t)0x1UL)

#define	MXC_S_GPIO_DS0_ALL_HD (MXC_V_GPIO_DS0_ALL_HD << MXC_F_GPIO_DS0_ALL_POS)

Detailed Description

GPIO Drive Strength Register. Each bit in this register selects the drive strength for the associated GPIO pin in this port. Refer to the Datasheet for sink/source current of GPIO pins in each mode.

Macro Definition Documentation

◆ MXC_F_GPIO_DS0_ALL

#define MXC_F_GPIO_DS0_ALL ((uint32_t)(0xFFFFFFFFUL << MXC_F_GPIO_DS0_ALL_POS))

DS0_ALL Mask

◆ MXC_F_GPIO_DS0_ALL_POS

#define MXC_F_GPIO_DS0_ALL_POS 0

DS0_ALL Position

◆ MXC_S_GPIO_DS0_ALL_HD

#define MXC_S_GPIO_DS0_ALL_HD (MXC_V_GPIO_DS0_ALL_HD << MXC_F_GPIO_DS0_ALL_POS)

DS0_ALL_HD Setting

◆ MXC_S_GPIO_DS0_ALL_LD

#define MXC_S_GPIO_DS0_ALL_LD (MXC_V_GPIO_DS0_ALL_LD << MXC_F_GPIO_DS0_ALL_POS)

DS0_ALL_LD Setting

◆ MXC_V_GPIO_DS0_ALL_HD

#define MXC_V_GPIO_DS0_ALL_HD ((uint32_t)0x1UL)

DS0_ALL_HD Value

◆ MXC_V_GPIO_DS0_ALL_LD

#define MXC_V_GPIO_DS0_ALL_LD ((uint32_t)0x0UL)

DS0_ALL_LD Value

Macros