RTC_SSEC

Macros
#define	MXC_F_RTC_SSEC_RTSS_POS   0
#define	MXC_F_RTC_SSEC_RTSS   ((uint32_t)(0xFFUL << MXC_F_RTC_SSEC_RTSS_POS))

Detailed Description

RTC Sub-second Counter. This counter increments at 256Hz. RTC_SEC is incremented when this register rolls over from 0xFF to 0x00.

Macro Definition Documentation

MXC_F_RTC_SSEC_RTSS

#define MXC_F_RTC_SSEC_RTSS   ((uint32_t)(0xFFUL << MXC_F_RTC_SSEC_RTSS_POS))

SSEC_RTSS Mask

MXC_F_RTC_SSEC_RTSS_POS

#define MXC_F_RTC_SSEC_RTSS_POS   0

SSEC_RTSS Position