![]() |
MAX32660 Peripheral Driver API
Peripheral Driver API for the MAX32660
|
Register for controlling SPI peripheral.
#define MXC_F_SPI_CTRL2_CLK_PHA ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_CLK_PHA_POS)) |
CTRL2_CLK_PHA Mask
#define MXC_F_SPI_CTRL2_CLK_PHA_POS 0 |
CTRL2_CLK_PHA Position
#define MXC_F_SPI_CTRL2_CLK_POL ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_CLK_POL_POS)) |
CTRL2_CLK_POL Mask
#define MXC_F_SPI_CTRL2_CLK_POL_POS 1 |
CTRL2_CLK_POL Position
#define MXC_F_SPI_CTRL2_DATA_WIDTH ((uint32_t)(0x3UL << MXC_F_SPI_CTRL2_DATA_WIDTH_POS)) |
CTRL2_DATA_WIDTH Mask
#define MXC_F_SPI_CTRL2_DATA_WIDTH_POS 12 |
CTRL2_DATA_WIDTH Position
#define MXC_F_SPI_CTRL2_NUM_BITS ((uint32_t)(0xFUL << MXC_F_SPI_CTRL2_NUM_BITS_POS)) |
CTRL2_NUM_BITS Mask
#define MXC_F_SPI_CTRL2_NUM_BITS_POS 8 |
CTRL2_NUM_BITS Position
#define MXC_F_SPI_CTRL2_SS_POL ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_SS_POL_POS)) |
CTRL2_SS_POL Mask
#define MXC_F_SPI_CTRL2_SS_POL_POS 16 |
CTRL2_SS_POL Position
#define MXC_F_SPI_CTRL2_THREE_WIRE ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_THREE_WIRE_POS)) |
CTRL2_THREE_WIRE Mask
#define MXC_F_SPI_CTRL2_THREE_WIRE_POS 15 |
CTRL2_THREE_WIRE Position
#define MXC_S_SPI_CTRL2_DATA_WIDTH_DUAL (MXC_V_SPI_CTRL2_DATA_WIDTH_DUAL << MXC_F_SPI_CTRL2_DATA_WIDTH_POS) |
CTRL2_DATA_WIDTH_DUAL Setting
#define MXC_S_SPI_CTRL2_DATA_WIDTH_MONO (MXC_V_SPI_CTRL2_DATA_WIDTH_MONO << MXC_F_SPI_CTRL2_DATA_WIDTH_POS) |
CTRL2_DATA_WIDTH_MONO Setting
#define MXC_S_SPI_CTRL2_DATA_WIDTH_QUAD (MXC_V_SPI_CTRL2_DATA_WIDTH_QUAD << MXC_F_SPI_CTRL2_DATA_WIDTH_POS) |
CTRL2_DATA_WIDTH_QUAD Setting
#define MXC_S_SPI_CTRL2_NUM_BITS_0 (MXC_V_SPI_CTRL2_NUM_BITS_0 << MXC_F_SPI_CTRL2_NUM_BITS_POS) |
CTRL2_NUM_BITS_0 Setting
#define MXC_V_SPI_CTRL2_DATA_WIDTH_DUAL ((uint32_t)0x1UL) |
CTRL2_DATA_WIDTH_DUAL Value
#define MXC_V_SPI_CTRL2_DATA_WIDTH_MONO ((uint32_t)0x0UL) |
CTRL2_DATA_WIDTH_MONO Value
#define MXC_V_SPI_CTRL2_DATA_WIDTH_QUAD ((uint32_t)0x2UL) |
CTRL2_DATA_WIDTH_QUAD Value
#define MXC_V_SPI_CTRL2_NUM_BITS_0 ((uint32_t)0x0UL) |
CTRL2_NUM_BITS_0 Value