Macros
#define	MXC_F_TMR_CN_TMODE_POS 0

#define	MXC_F_TMR_CN_TMODE ((uint32_t)(0x7UL << MXC_F_TMR_CN_TMODE_POS))

#define	MXC_V_TMR_CN_TMODE_ONE_SHOT ((uint32_t)0x0UL)

#define	MXC_S_TMR_CN_TMODE_ONE_SHOT (MXC_V_TMR_CN_TMODE_ONE_SHOT << MXC_F_TMR_CN_TMODE_POS)

#define	MXC_V_TMR_CN_TMODE_CONTINUOUS ((uint32_t)0x1UL)

#define	MXC_S_TMR_CN_TMODE_CONTINUOUS (MXC_V_TMR_CN_TMODE_CONTINUOUS << MXC_F_TMR_CN_TMODE_POS)

#define	MXC_V_TMR_CN_TMODE_COUNTER ((uint32_t)0x2UL)

#define	MXC_S_TMR_CN_TMODE_COUNTER (MXC_V_TMR_CN_TMODE_COUNTER << MXC_F_TMR_CN_TMODE_POS)

#define	MXC_V_TMR_CN_TMODE_PWM ((uint32_t)0x3UL)

#define	MXC_S_TMR_CN_TMODE_PWM (MXC_V_TMR_CN_TMODE_PWM << MXC_F_TMR_CN_TMODE_POS)

#define	MXC_V_TMR_CN_TMODE_CAPTURE ((uint32_t)0x4UL)

#define	MXC_S_TMR_CN_TMODE_CAPTURE (MXC_V_TMR_CN_TMODE_CAPTURE << MXC_F_TMR_CN_TMODE_POS)

#define	MXC_V_TMR_CN_TMODE_COMPARE ((uint32_t)0x5UL)

#define	MXC_S_TMR_CN_TMODE_COMPARE (MXC_V_TMR_CN_TMODE_COMPARE << MXC_F_TMR_CN_TMODE_POS)

#define	MXC_V_TMR_CN_TMODE_GATED ((uint32_t)0x6UL)

#define	MXC_S_TMR_CN_TMODE_GATED (MXC_V_TMR_CN_TMODE_GATED << MXC_F_TMR_CN_TMODE_POS)

#define	MXC_V_TMR_CN_TMODE_CAPCOMP ((uint32_t)0x7UL)

#define	MXC_S_TMR_CN_TMODE_CAPCOMP (MXC_V_TMR_CN_TMODE_CAPCOMP << MXC_F_TMR_CN_TMODE_POS)

#define	MXC_F_TMR_CN_PRES_POS 3

#define	MXC_F_TMR_CN_PRES ((uint32_t)(0x7UL << MXC_F_TMR_CN_PRES_POS))

#define	MXC_V_TMR_CN_PRES_DIV_BY_1 ((uint32_t)0x0UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_1 (MXC_V_TMR_CN_PRES_DIV_BY_1 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_2 ((uint32_t)0x1UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_2 (MXC_V_TMR_CN_PRES_DIV_BY_2 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_4 ((uint32_t)0x2UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_4 (MXC_V_TMR_CN_PRES_DIV_BY_4 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_8 ((uint32_t)0x3UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_8 (MXC_V_TMR_CN_PRES_DIV_BY_8 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_16 ((uint32_t)0x4UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_16 (MXC_V_TMR_CN_PRES_DIV_BY_16 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_32 ((uint32_t)0x5UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_32 (MXC_V_TMR_CN_PRES_DIV_BY_32 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_64 ((uint32_t)0x6UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_64 (MXC_V_TMR_CN_PRES_DIV_BY_64 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_128 ((uint32_t)0x7UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_128 (MXC_V_TMR_CN_PRES_DIV_BY_128 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_256 ((uint32_t)0x0UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_256 (MXC_V_TMR_CN_PRES_DIV_BY_256 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_512 ((uint32_t)0x1UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_512 (MXC_V_TMR_CN_PRES_DIV_BY_512 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_1024 ((uint32_t)0x2UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_1024 (MXC_V_TMR_CN_PRES_DIV_BY_1024 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_2048 ((uint32_t)0x3UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_2048 (MXC_V_TMR_CN_PRES_DIV_BY_2048 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_4096 ((uint32_t)0x4UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_4096 (MXC_V_TMR_CN_PRES_DIV_BY_4096 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_V_TMR_CN_PRES_DIV_BY_8192 ((uint32_t)0x5UL)

#define	MXC_S_TMR_CN_PRES_DIV_BY_8192 (MXC_V_TMR_CN_PRES_DIV_BY_8192 << MXC_F_TMR_CN_PRES_POS)

#define	MXC_F_TMR_CN_TPOL_POS 6

#define	MXC_F_TMR_CN_TPOL ((uint32_t)(0x1UL << MXC_F_TMR_CN_TPOL_POS))

#define	MXC_F_TMR_CN_TEN_POS 7

#define	MXC_F_TMR_CN_TEN ((uint32_t)(0x1UL << MXC_F_TMR_CN_TEN_POS))

#define	MXC_F_TMR_CN_PRES3_POS 8

#define	MXC_F_TMR_CN_PRES3 ((uint32_t)(0x1UL << MXC_F_TMR_CN_PRES3_POS))

#define	MXC_F_TMR_CN_PWMSYNC_POS 9

#define	MXC_F_TMR_CN_PWMSYNC ((uint32_t)(0x1UL << MXC_F_TMR_CN_PWMSYNC_POS))

#define	MXC_F_TMR_CN_NOLHPOL_POS 10

#define	MXC_F_TMR_CN_NOLHPOL ((uint32_t)(0x1UL << MXC_F_TMR_CN_NOLHPOL_POS))

#define	MXC_F_TMR_CN_NOLLPOL_POS 11

#define	MXC_F_TMR_CN_NOLLPOL ((uint32_t)(0x1UL << MXC_F_TMR_CN_NOLLPOL_POS))

#define	MXC_F_TMR_CN_PWMCKBD_POS 12

#define	MXC_F_TMR_CN_PWMCKBD ((uint32_t)(0x1UL << MXC_F_TMR_CN_PWMCKBD_POS))

Detailed Description

Timer Control Register.

Macro Definition Documentation

◆ MXC_F_TMR_CN_NOLHPOL

#define MXC_F_TMR_CN_NOLHPOL ((uint32_t)(0x1UL << MXC_F_TMR_CN_NOLHPOL_POS))

CN_NOLHPOL Mask

◆ MXC_F_TMR_CN_NOLHPOL_POS

#define MXC_F_TMR_CN_NOLHPOL_POS 10

CN_NOLHPOL Position

◆ MXC_F_TMR_CN_NOLLPOL

#define MXC_F_TMR_CN_NOLLPOL ((uint32_t)(0x1UL << MXC_F_TMR_CN_NOLLPOL_POS))

CN_NOLLPOL Mask

◆ MXC_F_TMR_CN_NOLLPOL_POS

#define MXC_F_TMR_CN_NOLLPOL_POS 11

CN_NOLLPOL Position

◆ MXC_F_TMR_CN_PRES

#define MXC_F_TMR_CN_PRES ((uint32_t)(0x7UL << MXC_F_TMR_CN_PRES_POS))

CN_PRES Mask

◆ MXC_F_TMR_CN_PRES3

#define MXC_F_TMR_CN_PRES3 ((uint32_t)(0x1UL << MXC_F_TMR_CN_PRES3_POS))

CN_PRES3 Mask

◆ MXC_F_TMR_CN_PRES3_POS

#define MXC_F_TMR_CN_PRES3_POS 8

CN_PRES3 Position

◆ MXC_F_TMR_CN_PRES_POS

#define MXC_F_TMR_CN_PRES_POS 3

CN_PRES Position

◆ MXC_F_TMR_CN_PWMCKBD

#define MXC_F_TMR_CN_PWMCKBD ((uint32_t)(0x1UL << MXC_F_TMR_CN_PWMCKBD_POS))

CN_PWMCKBD Mask

◆ MXC_F_TMR_CN_PWMCKBD_POS

#define MXC_F_TMR_CN_PWMCKBD_POS 12

CN_PWMCKBD Position

◆ MXC_F_TMR_CN_PWMSYNC

#define MXC_F_TMR_CN_PWMSYNC ((uint32_t)(0x1UL << MXC_F_TMR_CN_PWMSYNC_POS))

CN_PWMSYNC Mask

◆ MXC_F_TMR_CN_PWMSYNC_POS

#define MXC_F_TMR_CN_PWMSYNC_POS 9

CN_PWMSYNC Position

◆ MXC_F_TMR_CN_TEN

#define MXC_F_TMR_CN_TEN ((uint32_t)(0x1UL << MXC_F_TMR_CN_TEN_POS))

CN_TEN Mask

◆ MXC_F_TMR_CN_TEN_POS

#define MXC_F_TMR_CN_TEN_POS 7

CN_TEN Position

◆ MXC_F_TMR_CN_TMODE

#define MXC_F_TMR_CN_TMODE ((uint32_t)(0x7UL << MXC_F_TMR_CN_TMODE_POS))

CN_TMODE Mask

◆ MXC_F_TMR_CN_TMODE_POS

#define MXC_F_TMR_CN_TMODE_POS 0

CN_TMODE Position

◆ MXC_F_TMR_CN_TPOL

#define MXC_F_TMR_CN_TPOL ((uint32_t)(0x1UL << MXC_F_TMR_CN_TPOL_POS))

CN_TPOL Mask

◆ MXC_F_TMR_CN_TPOL_POS

#define MXC_F_TMR_CN_TPOL_POS 6

CN_TPOL Position

◆ MXC_S_TMR_CN_PRES_DIV_BY_1

#define MXC_S_TMR_CN_PRES_DIV_BY_1 (MXC_V_TMR_CN_PRES_DIV_BY_1 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_1 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_1024

#define MXC_S_TMR_CN_PRES_DIV_BY_1024 (MXC_V_TMR_CN_PRES_DIV_BY_1024 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_1024 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_128

#define MXC_S_TMR_CN_PRES_DIV_BY_128 (MXC_V_TMR_CN_PRES_DIV_BY_128 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_128 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_16

#define MXC_S_TMR_CN_PRES_DIV_BY_16 (MXC_V_TMR_CN_PRES_DIV_BY_16 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_16 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_2

#define MXC_S_TMR_CN_PRES_DIV_BY_2 (MXC_V_TMR_CN_PRES_DIV_BY_2 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_2 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_2048

#define MXC_S_TMR_CN_PRES_DIV_BY_2048 (MXC_V_TMR_CN_PRES_DIV_BY_2048 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_2048 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_256

#define MXC_S_TMR_CN_PRES_DIV_BY_256 (MXC_V_TMR_CN_PRES_DIV_BY_256 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_256 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_32

#define MXC_S_TMR_CN_PRES_DIV_BY_32 (MXC_V_TMR_CN_PRES_DIV_BY_32 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_32 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_4

#define MXC_S_TMR_CN_PRES_DIV_BY_4 (MXC_V_TMR_CN_PRES_DIV_BY_4 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_4 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_4096

#define MXC_S_TMR_CN_PRES_DIV_BY_4096 (MXC_V_TMR_CN_PRES_DIV_BY_4096 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_4096 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_512

#define MXC_S_TMR_CN_PRES_DIV_BY_512 (MXC_V_TMR_CN_PRES_DIV_BY_512 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_512 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_64

#define MXC_S_TMR_CN_PRES_DIV_BY_64 (MXC_V_TMR_CN_PRES_DIV_BY_64 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_64 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_8

#define MXC_S_TMR_CN_PRES_DIV_BY_8 (MXC_V_TMR_CN_PRES_DIV_BY_8 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_8 Setting

◆ MXC_S_TMR_CN_PRES_DIV_BY_8192

#define MXC_S_TMR_CN_PRES_DIV_BY_8192 (MXC_V_TMR_CN_PRES_DIV_BY_8192 << MXC_F_TMR_CN_PRES_POS)

CN_PRES_DIV_BY_8192 Setting

◆ MXC_S_TMR_CN_TMODE_CAPCOMP

#define MXC_S_TMR_CN_TMODE_CAPCOMP (MXC_V_TMR_CN_TMODE_CAPCOMP << MXC_F_TMR_CN_TMODE_POS)

CN_TMODE_CAPCOMP Setting

◆ MXC_S_TMR_CN_TMODE_CAPTURE

#define MXC_S_TMR_CN_TMODE_CAPTURE (MXC_V_TMR_CN_TMODE_CAPTURE << MXC_F_TMR_CN_TMODE_POS)

CN_TMODE_CAPTURE Setting

◆ MXC_S_TMR_CN_TMODE_COMPARE

#define MXC_S_TMR_CN_TMODE_COMPARE (MXC_V_TMR_CN_TMODE_COMPARE << MXC_F_TMR_CN_TMODE_POS)

CN_TMODE_COMPARE Setting

◆ MXC_S_TMR_CN_TMODE_CONTINUOUS

#define MXC_S_TMR_CN_TMODE_CONTINUOUS (MXC_V_TMR_CN_TMODE_CONTINUOUS << MXC_F_TMR_CN_TMODE_POS)

CN_TMODE_CONTINUOUS Setting

◆ MXC_S_TMR_CN_TMODE_COUNTER

#define MXC_S_TMR_CN_TMODE_COUNTER (MXC_V_TMR_CN_TMODE_COUNTER << MXC_F_TMR_CN_TMODE_POS)

CN_TMODE_COUNTER Setting

◆ MXC_S_TMR_CN_TMODE_GATED

#define MXC_S_TMR_CN_TMODE_GATED (MXC_V_TMR_CN_TMODE_GATED << MXC_F_TMR_CN_TMODE_POS)

CN_TMODE_GATED Setting

◆ MXC_S_TMR_CN_TMODE_ONE_SHOT

#define MXC_S_TMR_CN_TMODE_ONE_SHOT (MXC_V_TMR_CN_TMODE_ONE_SHOT << MXC_F_TMR_CN_TMODE_POS)

CN_TMODE_ONE_SHOT Setting

◆ MXC_S_TMR_CN_TMODE_PWM

#define MXC_S_TMR_CN_TMODE_PWM (MXC_V_TMR_CN_TMODE_PWM << MXC_F_TMR_CN_TMODE_POS)

CN_TMODE_PWM Setting

◆ MXC_V_TMR_CN_PRES_DIV_BY_1

#define MXC_V_TMR_CN_PRES_DIV_BY_1 ((uint32_t)0x0UL)

CN_PRES_DIV_BY_1 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_1024

#define MXC_V_TMR_CN_PRES_DIV_BY_1024 ((uint32_t)0x2UL)

CN_PRES_DIV_BY_1024 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_128

#define MXC_V_TMR_CN_PRES_DIV_BY_128 ((uint32_t)0x7UL)

CN_PRES_DIV_BY_128 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_16

#define MXC_V_TMR_CN_PRES_DIV_BY_16 ((uint32_t)0x4UL)

CN_PRES_DIV_BY_16 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_2

#define MXC_V_TMR_CN_PRES_DIV_BY_2 ((uint32_t)0x1UL)

CN_PRES_DIV_BY_2 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_2048

#define MXC_V_TMR_CN_PRES_DIV_BY_2048 ((uint32_t)0x3UL)

CN_PRES_DIV_BY_2048 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_256

#define MXC_V_TMR_CN_PRES_DIV_BY_256 ((uint32_t)0x0UL)

CN_PRES_DIV_BY_256 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_32

#define MXC_V_TMR_CN_PRES_DIV_BY_32 ((uint32_t)0x5UL)

CN_PRES_DIV_BY_32 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_4

#define MXC_V_TMR_CN_PRES_DIV_BY_4 ((uint32_t)0x2UL)

CN_PRES_DIV_BY_4 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_4096

#define MXC_V_TMR_CN_PRES_DIV_BY_4096 ((uint32_t)0x4UL)

CN_PRES_DIV_BY_4096 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_512

#define MXC_V_TMR_CN_PRES_DIV_BY_512 ((uint32_t)0x1UL)

CN_PRES_DIV_BY_512 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_64

#define MXC_V_TMR_CN_PRES_DIV_BY_64 ((uint32_t)0x6UL)

CN_PRES_DIV_BY_64 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_8

#define MXC_V_TMR_CN_PRES_DIV_BY_8 ((uint32_t)0x3UL)

CN_PRES_DIV_BY_8 Value

◆ MXC_V_TMR_CN_PRES_DIV_BY_8192

#define MXC_V_TMR_CN_PRES_DIV_BY_8192 ((uint32_t)0x5UL)

CN_PRES_DIV_BY_8192 Value

◆ MXC_V_TMR_CN_TMODE_CAPCOMP

#define MXC_V_TMR_CN_TMODE_CAPCOMP ((uint32_t)0x7UL)

CN_TMODE_CAPCOMP Value

◆ MXC_V_TMR_CN_TMODE_CAPTURE

#define MXC_V_TMR_CN_TMODE_CAPTURE ((uint32_t)0x4UL)

CN_TMODE_CAPTURE Value

◆ MXC_V_TMR_CN_TMODE_COMPARE

#define MXC_V_TMR_CN_TMODE_COMPARE ((uint32_t)0x5UL)

CN_TMODE_COMPARE Value

◆ MXC_V_TMR_CN_TMODE_CONTINUOUS

#define MXC_V_TMR_CN_TMODE_CONTINUOUS ((uint32_t)0x1UL)

CN_TMODE_CONTINUOUS Value

◆ MXC_V_TMR_CN_TMODE_COUNTER

#define MXC_V_TMR_CN_TMODE_COUNTER ((uint32_t)0x2UL)

CN_TMODE_COUNTER Value

◆ MXC_V_TMR_CN_TMODE_GATED

#define MXC_V_TMR_CN_TMODE_GATED ((uint32_t)0x6UL)

CN_TMODE_GATED Value

◆ MXC_V_TMR_CN_TMODE_ONE_SHOT

#define MXC_V_TMR_CN_TMODE_ONE_SHOT ((uint32_t)0x0UL)

CN_TMODE_ONE_SHOT Value

◆ MXC_V_TMR_CN_TMODE_PWM

#define MXC_V_TMR_CN_TMODE_PWM ((uint32_t)0x3UL)

CN_TMODE_PWM Value

Macros