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MAX32660 Peripheral Driver API
Peripheral Driver API for the MAX32660
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Control Register.
| #define MXC_F_UART_CTRL0_BITACC ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_BITACC_POS)) |
CTRL0_BITACC Mask
| #define MXC_F_UART_CTRL0_BITACC_POS 7 |
CTRL0_BITACC Position
| #define MXC_F_UART_CTRL0_BREAK ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_BREAK_POS)) |
CTRL0_BREAK Mask
| #define MXC_F_UART_CTRL0_BREAK_POS 14 |
CTRL0_BREAK Position
| #define MXC_F_UART_CTRL0_CLK_SEL ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_CLK_SEL_POS)) |
CTRL0_CLK_SEL Mask
| #define MXC_F_UART_CTRL0_CLK_SEL_POS 15 |
CTRL0_CLK_SEL Position
| #define MXC_F_UART_CTRL0_ENABLE ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_ENABLE_POS)) |
CTRL0_ENABLE Mask
| #define MXC_F_UART_CTRL0_ENABLE_POS 0 |
CTRL0_ENABLE Position
| #define MXC_F_UART_CTRL0_FLOW ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_FLOW_POS)) |
CTRL0_FLOW Mask
| #define MXC_F_UART_CTRL0_FLOW_POS 11 |
CTRL0_FLOW Position
| #define MXC_F_UART_CTRL0_FLOWPOL ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_FLOWPOL_POS)) |
CTRL0_FLOWPOL Mask
| #define MXC_F_UART_CTRL0_FLOWPOL_POS 12 |
CTRL0_FLOWPOL Position
| #define MXC_F_UART_CTRL0_NULLMOD ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_NULLMOD_POS)) |
CTRL0_NULLMOD Mask
| #define MXC_F_UART_CTRL0_NULLMOD_POS 13 |
CTRL0_NULLMOD Position
| #define MXC_F_UART_CTRL0_PARITY_EN ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_PARITY_EN_POS)) |
CTRL0_PARITY_EN Mask
| #define MXC_F_UART_CTRL0_PARITY_EN_POS 1 |
CTRL0_PARITY_EN Position
| #define MXC_F_UART_CTRL0_PARITY_LVL ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_PARITY_LVL_POS)) |
CTRL0_PARITY_LVL Mask
| #define MXC_F_UART_CTRL0_PARITY_LVL_POS 4 |
CTRL0_PARITY_LVL Position
| #define MXC_F_UART_CTRL0_PARITY_MODE ((uint32_t)(0x3UL << MXC_F_UART_CTRL0_PARITY_MODE_POS)) |
CTRL0_PARITY_MODE Mask
| #define MXC_F_UART_CTRL0_PARITY_MODE_POS 2 |
CTRL0_PARITY_MODE Position
| #define MXC_F_UART_CTRL0_RXFLUSH ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_RXFLUSH_POS)) |
CTRL0_RXFLUSH Mask
| #define MXC_F_UART_CTRL0_RXFLUSH_POS 6 |
CTRL0_RXFLUSH Position
| #define MXC_F_UART_CTRL0_SIZE ((uint32_t)(0x3UL << MXC_F_UART_CTRL0_SIZE_POS)) |
CTRL0_SIZE Mask
| #define MXC_F_UART_CTRL0_SIZE_POS 8 |
CTRL0_SIZE Position
| #define MXC_F_UART_CTRL0_STOP ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_STOP_POS)) |
CTRL0_STOP Mask
| #define MXC_F_UART_CTRL0_STOP_POS 10 |
CTRL0_STOP Position
| #define MXC_F_UART_CTRL0_TO_CNT ((uint32_t)(0xFFUL << MXC_F_UART_CTRL0_TO_CNT_POS)) |
CTRL0_TO_CNT Mask
| #define MXC_F_UART_CTRL0_TO_CNT_POS 16 |
CTRL0_TO_CNT Position
| #define MXC_F_UART_CTRL0_TXFLUSH ((uint32_t)(0x1UL << MXC_F_UART_CTRL0_TXFLUSH_POS)) |
CTRL0_TXFLUSH Mask
| #define MXC_F_UART_CTRL0_TXFLUSH_POS 5 |
CTRL0_TXFLUSH Position
| #define MXC_S_UART_CTRL0_PARITY_MODE_EVEN (MXC_V_UART_CTRL0_PARITY_MODE_EVEN << MXC_F_UART_CTRL0_PARITY_MODE_POS) |
CTRL0_PARITY_MODE_EVEN Setting
| #define MXC_S_UART_CTRL0_PARITY_MODE_MARK (MXC_V_UART_CTRL0_PARITY_MODE_MARK << MXC_F_UART_CTRL0_PARITY_MODE_POS) |
CTRL0_PARITY_MODE_MARK Setting
| #define MXC_S_UART_CTRL0_PARITY_MODE_ODD (MXC_V_UART_CTRL0_PARITY_MODE_ODD << MXC_F_UART_CTRL0_PARITY_MODE_POS) |
CTRL0_PARITY_MODE_ODD Setting
| #define MXC_S_UART_CTRL0_PARITY_MODE_SPACE (MXC_V_UART_CTRL0_PARITY_MODE_SPACE << MXC_F_UART_CTRL0_PARITY_MODE_POS) |
CTRL0_PARITY_MODE_SPACE Setting
| #define MXC_S_UART_CTRL0_SIZE_5 (MXC_V_UART_CTRL0_SIZE_5 << MXC_F_UART_CTRL0_SIZE_POS) |
CTRL0_SIZE_5 Setting
| #define MXC_S_UART_CTRL0_SIZE_6 (MXC_V_UART_CTRL0_SIZE_6 << MXC_F_UART_CTRL0_SIZE_POS) |
CTRL0_SIZE_6 Setting
| #define MXC_S_UART_CTRL0_SIZE_7 (MXC_V_UART_CTRL0_SIZE_7 << MXC_F_UART_CTRL0_SIZE_POS) |
CTRL0_SIZE_7 Setting
| #define MXC_S_UART_CTRL0_SIZE_8 (MXC_V_UART_CTRL0_SIZE_8 << MXC_F_UART_CTRL0_SIZE_POS) |
CTRL0_SIZE_8 Setting
| #define MXC_V_UART_CTRL0_PARITY_MODE_EVEN ((uint32_t)0x0UL) |
CTRL0_PARITY_MODE_EVEN Value
| #define MXC_V_UART_CTRL0_PARITY_MODE_MARK ((uint32_t)0x2UL) |
CTRL0_PARITY_MODE_MARK Value
| #define MXC_V_UART_CTRL0_PARITY_MODE_ODD ((uint32_t)0x1UL) |
CTRL0_PARITY_MODE_ODD Value
| #define MXC_V_UART_CTRL0_PARITY_MODE_SPACE ((uint32_t)0x3UL) |
CTRL0_PARITY_MODE_SPACE Value
| #define MXC_V_UART_CTRL0_SIZE_5 ((uint32_t)0x0UL) |
CTRL0_SIZE_5 Value
| #define MXC_V_UART_CTRL0_SIZE_6 ((uint32_t)0x1UL) |
CTRL0_SIZE_6 Value
| #define MXC_V_UART_CTRL0_SIZE_7 ((uint32_t)0x2UL) |
CTRL0_SIZE_7 Value
| #define MXC_V_UART_CTRL0_SIZE_8 ((uint32_t)0x3UL) |
CTRL0_SIZE_8 Value