MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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I2C_INT_FL0

Macros

#define MXC_F_I2C_INT_FL0_DONE_POS   0
 
#define MXC_F_I2C_INT_FL0_DONE   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DONE_POS))
 
#define MXC_F_I2C_INT_FL0_RX_MODE_POS   1
 
#define MXC_F_I2C_INT_FL0_RX_MODE   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RX_MODE_POS))
 
#define MXC_F_I2C_INT_FL0_GEN_CALL_ADDR_POS   2
 
#define MXC_F_I2C_INT_FL0_GEN_CALL_ADDR   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_GEN_CALL_ADDR_POS))
 
#define MXC_F_I2C_INT_FL0_ADDR_MATCH_POS   3
 
#define MXC_F_I2C_INT_FL0_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_MATCH_POS))
 
#define MXC_F_I2C_INT_FL0_RX_THRESH_POS   4
 
#define MXC_F_I2C_INT_FL0_RX_THRESH   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RX_THRESH_POS))
 
#define MXC_F_I2C_INT_FL0_TX_THRESH_POS   5
 
#define MXC_F_I2C_INT_FL0_TX_THRESH   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TX_THRESH_POS))
 
#define MXC_F_I2C_INT_FL0_STOP_POS   6
 
#define MXC_F_I2C_INT_FL0_STOP   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STOP_POS))
 
#define MXC_F_I2C_INT_FL0_ADDR_ACK_POS   7
 
#define MXC_F_I2C_INT_FL0_ADDR_ACK   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_ACK_POS))
 
#define MXC_F_I2C_INT_FL0_ARB_ER_POS   8
 
#define MXC_F_I2C_INT_FL0_ARB_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ARB_ER_POS))
 
#define MXC_F_I2C_INT_FL0_TO_ER_POS   9
 
#define MXC_F_I2C_INT_FL0_TO_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TO_ER_POS))
 
#define MXC_F_I2C_INT_FL0_ADDR_NACK_ER_POS   10
 
#define MXC_F_I2C_INT_FL0_ADDR_NACK_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_NACK_ER_POS))
 
#define MXC_F_I2C_INT_FL0_DATA_ER_POS   11
 
#define MXC_F_I2C_INT_FL0_DATA_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DATA_ER_POS))
 
#define MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER_POS   12
 
#define MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER_POS))
 
#define MXC_F_I2C_INT_FL0_START_ER_POS   13
 
#define MXC_F_I2C_INT_FL0_START_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_START_ER_POS))
 
#define MXC_F_I2C_INT_FL0_STOP_ER_POS   14
 
#define MXC_F_I2C_INT_FL0_STOP_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STOP_ER_POS))
 
#define MXC_F_I2C_INT_FL0_TX_LOCK_OUT_POS   15
 
#define MXC_F_I2C_INT_FL0_TX_LOCK_OUT   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TX_LOCK_OUT_POS))
 
#define MXC_F_I2C_INT_FL0_RD_ADDR_MATCH_POS   22
 
#define MXC_F_I2C_INT_FL0_RD_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RD_ADDR_MATCH_POS))
 
#define MXC_F_I2C_INT_FL0_WR_ADDR_MATCH_POS   23
 
#define MXC_F_I2C_INT_FL0_WR_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_WR_ADDR_MATCH_POS))
 

Detailed Description

Interrupt Status Register.

Macro Definition Documentation

◆ MXC_F_I2C_INT_FL0_ADDR_ACK

#define MXC_F_I2C_INT_FL0_ADDR_ACK   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_ACK_POS))

INT_FL0_ADDR_ACK Mask

◆ MXC_F_I2C_INT_FL0_ADDR_ACK_POS

#define MXC_F_I2C_INT_FL0_ADDR_ACK_POS   7

INT_FL0_ADDR_ACK Position

◆ MXC_F_I2C_INT_FL0_ADDR_MATCH

#define MXC_F_I2C_INT_FL0_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_MATCH_POS))

INT_FL0_ADDR_MATCH Mask

◆ MXC_F_I2C_INT_FL0_ADDR_MATCH_POS

#define MXC_F_I2C_INT_FL0_ADDR_MATCH_POS   3

INT_FL0_ADDR_MATCH Position

◆ MXC_F_I2C_INT_FL0_ADDR_NACK_ER

#define MXC_F_I2C_INT_FL0_ADDR_NACK_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADDR_NACK_ER_POS))

INT_FL0_ADDR_NACK_ER Mask

◆ MXC_F_I2C_INT_FL0_ADDR_NACK_ER_POS

#define MXC_F_I2C_INT_FL0_ADDR_NACK_ER_POS   10

INT_FL0_ADDR_NACK_ER Position

◆ MXC_F_I2C_INT_FL0_ARB_ER

#define MXC_F_I2C_INT_FL0_ARB_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ARB_ER_POS))

INT_FL0_ARB_ER Mask

◆ MXC_F_I2C_INT_FL0_ARB_ER_POS

#define MXC_F_I2C_INT_FL0_ARB_ER_POS   8

INT_FL0_ARB_ER Position

◆ MXC_F_I2C_INT_FL0_DATA_ER

#define MXC_F_I2C_INT_FL0_DATA_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DATA_ER_POS))

INT_FL0_DATA_ER Mask

◆ MXC_F_I2C_INT_FL0_DATA_ER_POS

#define MXC_F_I2C_INT_FL0_DATA_ER_POS   11

INT_FL0_DATA_ER Position

◆ MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER

#define MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER_POS))

INT_FL0_DO_NOT_RESP_ER Mask

◆ MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER_POS

#define MXC_F_I2C_INT_FL0_DO_NOT_RESP_ER_POS   12

INT_FL0_DO_NOT_RESP_ER Position

◆ MXC_F_I2C_INT_FL0_DONE

#define MXC_F_I2C_INT_FL0_DONE   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DONE_POS))

INT_FL0_DONE Mask

◆ MXC_F_I2C_INT_FL0_DONE_POS

#define MXC_F_I2C_INT_FL0_DONE_POS   0

INT_FL0_DONE Position

◆ MXC_F_I2C_INT_FL0_GEN_CALL_ADDR

#define MXC_F_I2C_INT_FL0_GEN_CALL_ADDR   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_GEN_CALL_ADDR_POS))

INT_FL0_GEN_CALL_ADDR Mask

◆ MXC_F_I2C_INT_FL0_GEN_CALL_ADDR_POS

#define MXC_F_I2C_INT_FL0_GEN_CALL_ADDR_POS   2

INT_FL0_GEN_CALL_ADDR Position

◆ MXC_F_I2C_INT_FL0_RD_ADDR_MATCH

#define MXC_F_I2C_INT_FL0_RD_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RD_ADDR_MATCH_POS))

INT_FL0_RD_ADDR_MATCH Mask

◆ MXC_F_I2C_INT_FL0_RD_ADDR_MATCH_POS

#define MXC_F_I2C_INT_FL0_RD_ADDR_MATCH_POS   22

INT_FL0_RD_ADDR_MATCH Position

◆ MXC_F_I2C_INT_FL0_RX_MODE

#define MXC_F_I2C_INT_FL0_RX_MODE   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RX_MODE_POS))

INT_FL0_RX_MODE Mask

◆ MXC_F_I2C_INT_FL0_RX_MODE_POS

#define MXC_F_I2C_INT_FL0_RX_MODE_POS   1

INT_FL0_RX_MODE Position

◆ MXC_F_I2C_INT_FL0_RX_THRESH

#define MXC_F_I2C_INT_FL0_RX_THRESH   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RX_THRESH_POS))

INT_FL0_RX_THRESH Mask

◆ MXC_F_I2C_INT_FL0_RX_THRESH_POS

#define MXC_F_I2C_INT_FL0_RX_THRESH_POS   4

INT_FL0_RX_THRESH Position

◆ MXC_F_I2C_INT_FL0_START_ER

#define MXC_F_I2C_INT_FL0_START_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_START_ER_POS))

INT_FL0_START_ER Mask

◆ MXC_F_I2C_INT_FL0_START_ER_POS

#define MXC_F_I2C_INT_FL0_START_ER_POS   13

INT_FL0_START_ER Position

◆ MXC_F_I2C_INT_FL0_STOP

#define MXC_F_I2C_INT_FL0_STOP   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STOP_POS))

INT_FL0_STOP Mask

◆ MXC_F_I2C_INT_FL0_STOP_ER

#define MXC_F_I2C_INT_FL0_STOP_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STOP_ER_POS))

INT_FL0_STOP_ER Mask

◆ MXC_F_I2C_INT_FL0_STOP_ER_POS

#define MXC_F_I2C_INT_FL0_STOP_ER_POS   14

INT_FL0_STOP_ER Position

◆ MXC_F_I2C_INT_FL0_STOP_POS

#define MXC_F_I2C_INT_FL0_STOP_POS   6

INT_FL0_STOP Position

◆ MXC_F_I2C_INT_FL0_TO_ER

#define MXC_F_I2C_INT_FL0_TO_ER   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TO_ER_POS))

INT_FL0_TO_ER Mask

◆ MXC_F_I2C_INT_FL0_TO_ER_POS

#define MXC_F_I2C_INT_FL0_TO_ER_POS   9

INT_FL0_TO_ER Position

◆ MXC_F_I2C_INT_FL0_TX_LOCK_OUT

#define MXC_F_I2C_INT_FL0_TX_LOCK_OUT   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TX_LOCK_OUT_POS))

INT_FL0_TX_LOCK_OUT Mask

◆ MXC_F_I2C_INT_FL0_TX_LOCK_OUT_POS

#define MXC_F_I2C_INT_FL0_TX_LOCK_OUT_POS   15

INT_FL0_TX_LOCK_OUT Position

◆ MXC_F_I2C_INT_FL0_TX_THRESH

#define MXC_F_I2C_INT_FL0_TX_THRESH   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TX_THRESH_POS))

INT_FL0_TX_THRESH Mask

◆ MXC_F_I2C_INT_FL0_TX_THRESH_POS

#define MXC_F_I2C_INT_FL0_TX_THRESH_POS   5

INT_FL0_TX_THRESH Position

◆ MXC_F_I2C_INT_FL0_WR_ADDR_MATCH

#define MXC_F_I2C_INT_FL0_WR_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_WR_ADDR_MATCH_POS))

INT_FL0_WR_ADDR_MATCH Mask

◆ MXC_F_I2C_INT_FL0_WR_ADDR_MATCH_POS

#define MXC_F_I2C_INT_FL0_WR_ADDR_MATCH_POS   23

INT_FL0_WR_ADDR_MATCH Position