MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
Register Offsets

Macros

#define MXC_R_UART_CTRL   ((uint32_t)0x00000000UL)
 
#define MXC_R_UART_THRESH_CTRL   ((uint32_t)0x00000004UL)
 
#define MXC_R_UART_STATUS   ((uint32_t)0x00000008UL)
 
#define MXC_R_UART_INT_EN   ((uint32_t)0x0000000CUL)
 
#define MXC_R_UART_INT_FL   ((uint32_t)0x00000010UL)
 
#define MXC_R_UART_BAUD0   ((uint32_t)0x00000014UL)
 
#define MXC_R_UART_BAUD1   ((uint32_t)0x00000018UL)
 
#define MXC_R_UART_FIFO   ((uint32_t)0x0000001CUL)
 
#define MXC_R_UART_DMA   ((uint32_t)0x00000020UL)
 
#define MXC_R_UART_TX_FIFO   ((uint32_t)0x00000024UL)
 

Detailed Description

UART Peripheral Register Offsets from the UART Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_UART_BAUD0

#define MXC_R_UART_BAUD0   ((uint32_t)0x00000014UL)

Offset from UART Base Address: 0x0014

◆ MXC_R_UART_BAUD1

#define MXC_R_UART_BAUD1   ((uint32_t)0x00000018UL)

Offset from UART Base Address: 0x0018

◆ MXC_R_UART_CTRL

#define MXC_R_UART_CTRL   ((uint32_t)0x00000000UL)

Offset from UART Base Address: 0x0000

◆ MXC_R_UART_DMA

#define MXC_R_UART_DMA   ((uint32_t)0x00000020UL)

Offset from UART Base Address: 0x0020

◆ MXC_R_UART_FIFO

#define MXC_R_UART_FIFO   ((uint32_t)0x0000001CUL)

Offset from UART Base Address: 0x001C

◆ MXC_R_UART_INT_EN

#define MXC_R_UART_INT_EN   ((uint32_t)0x0000000CUL)

Offset from UART Base Address: 0x000C

◆ MXC_R_UART_INT_FL

#define MXC_R_UART_INT_FL   ((uint32_t)0x00000010UL)

Offset from UART Base Address: 0x0010

◆ MXC_R_UART_STATUS

#define MXC_R_UART_STATUS   ((uint32_t)0x00000008UL)

Offset from UART Base Address: 0x0008

◆ MXC_R_UART_THRESH_CTRL

#define MXC_R_UART_THRESH_CTRL   ((uint32_t)0x00000004UL)

Offset from UART Base Address: 0x0004

◆ MXC_R_UART_TX_FIFO

#define MXC_R_UART_TX_FIFO   ((uint32_t)0x00000024UL)

Offset from UART Base Address: 0x0024