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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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Control status register for EP 0 (when INDEX == 0).
#define MXC_F_USBHS_CSR0_DATA_END ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_DATA_END_POS)) |
CSR0_DATA_END Mask
#define MXC_F_USBHS_CSR0_DATA_END_POS 3 |
CSR0_DATA_END Position
#define MXC_F_USBHS_CSR0_INPKTRDY ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_INPKTRDY_POS)) |
CSR0_INPKTRDY Mask
#define MXC_F_USBHS_CSR0_INPKTRDY_POS 1 |
CSR0_INPKTRDY Position
#define MXC_F_USBHS_CSR0_OUTPKTRDY ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_OUTPKTRDY_POS)) |
CSR0_OUTPKTRDY Mask
#define MXC_F_USBHS_CSR0_OUTPKTRDY_POS 0 |
CSR0_OUTPKTRDY Position
#define MXC_F_USBHS_CSR0_SEND_STALL ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_SEND_STALL_POS)) |
CSR0_SEND_STALL Mask
#define MXC_F_USBHS_CSR0_SEND_STALL_POS 5 |
CSR0_SEND_STALL Position
#define MXC_F_USBHS_CSR0_SENT_STALL ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_SENT_STALL_POS)) |
CSR0_SENT_STALL Mask
#define MXC_F_USBHS_CSR0_SENT_STALL_POS 2 |
CSR0_SENT_STALL Position
#define MXC_F_USBHS_CSR0_SERV_OUTPKTRDY ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_SERV_OUTPKTRDY_POS)) |
CSR0_SERV_OUTPKTRDY Mask
#define MXC_F_USBHS_CSR0_SERV_OUTPKTRDY_POS 6 |
CSR0_SERV_OUTPKTRDY Position
#define MXC_F_USBHS_CSR0_SERV_SETUP_END ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_SERV_SETUP_END_POS)) |
CSR0_SERV_SETUP_END Mask
#define MXC_F_USBHS_CSR0_SERV_SETUP_END_POS 7 |
CSR0_SERV_SETUP_END Position
#define MXC_F_USBHS_CSR0_SETUP_END ((uint8_t)(0x1UL << MXC_F_USBHS_CSR0_SETUP_END_POS)) |
CSR0_SETUP_END Mask
#define MXC_F_USBHS_CSR0_SETUP_END_POS 4 |
CSR0_SETUP_END Position