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#define | MXC_R_SPIXFM_CFG ((uint32_t)0x00000000UL) |
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#define | MXC_R_SPIXFM_FETCH_CTRL ((uint32_t)0x00000004UL) |
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#define | MXC_R_SPIXFM_MODE_CTRL ((uint32_t)0x00000008UL) |
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#define | MXC_R_SPIXFM_MODE_DATA ((uint32_t)0x0000000CUL) |
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#define | MXC_R_SPIXFM_SCLK_FB_CTRL ((uint32_t)0x00000010UL) |
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#define | MXC_R_SPIXFM_IO_CTRL ((uint32_t)0x0000001CUL) |
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#define | MXC_R_SPIXFM_MEMSECCN ((uint32_t)0x00000020UL) |
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#define | MXC_R_SPIXFM_BUS_IDLE ((uint32_t)0x00000024UL) |
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#define | MXC_F_SPIXFM_CFG_MODE_POS 0 |
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#define | MXC_F_SPIXFM_CFG_MODE ((uint32_t)(0x3UL << MXC_F_SPIXFM_CFG_MODE_POS)) |
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#define | MXC_V_SPIXFM_CFG_MODE_SCLK_HI_SAMPLE_RISING ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFM_CFG_MODE_SCLK_HI_SAMPLE_RISING (MXC_V_SPIXFM_CFG_MODE_SCLK_HI_SAMPLE_RISING << MXC_F_SPIXFM_CFG_MODE_POS) |
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#define | MXC_V_SPIXFM_CFG_MODE_SCLK_LO_SAMPLE_FAILLING ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFM_CFG_MODE_SCLK_LO_SAMPLE_FAILLING (MXC_V_SPIXFM_CFG_MODE_SCLK_LO_SAMPLE_FAILLING << MXC_F_SPIXFM_CFG_MODE_POS) |
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#define | MXC_F_SPIXFM_CFG_SSPOL_POS 2 |
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#define | MXC_F_SPIXFM_CFG_SSPOL ((uint32_t)(0x1UL << MXC_F_SPIXFM_CFG_SSPOL_POS)) |
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#define | MXC_F_SPIXFM_CFG_SSEL_POS 4 |
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#define | MXC_F_SPIXFM_CFG_SSEL ((uint32_t)(0x7UL << MXC_F_SPIXFM_CFG_SSEL_POS)) |
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#define | MXC_F_SPIXFM_CFG_LO_CLK_POS 8 |
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#define | MXC_F_SPIXFM_CFG_LO_CLK ((uint32_t)(0xFUL << MXC_F_SPIXFM_CFG_LO_CLK_POS)) |
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#define | MXC_F_SPIXFM_CFG_HI_CLK_POS 12 |
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#define | MXC_F_SPIXFM_CFG_HI_CLK ((uint32_t)(0xFUL << MXC_F_SPIXFM_CFG_HI_CLK_POS)) |
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#define | MXC_F_SPIXFM_CFG_SSACT_POS 16 |
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#define | MXC_F_SPIXFM_CFG_SSACT ((uint32_t)(0x3UL << MXC_F_SPIXFM_CFG_SSACT_POS)) |
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#define | MXC_V_SPIXFM_CFG_SSACT_OFF ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFM_CFG_SSACT_OFF (MXC_V_SPIXFM_CFG_SSACT_OFF << MXC_F_SPIXFM_CFG_SSACT_POS) |
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#define | MXC_V_SPIXFM_CFG_SSACT_FOR_2_MOD_CLK ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFM_CFG_SSACT_FOR_2_MOD_CLK (MXC_V_SPIXFM_CFG_SSACT_FOR_2_MOD_CLK << MXC_F_SPIXFM_CFG_SSACT_POS) |
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#define | MXC_V_SPIXFM_CFG_SSACT_FOR_4_MOD_CLK ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFM_CFG_SSACT_FOR_4_MOD_CLK (MXC_V_SPIXFM_CFG_SSACT_FOR_4_MOD_CLK << MXC_F_SPIXFM_CFG_SSACT_POS) |
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#define | MXC_V_SPIXFM_CFG_SSACT_FOR_8_MOD_CLK ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFM_CFG_SSACT_FOR_8_MOD_CLK (MXC_V_SPIXFM_CFG_SSACT_FOR_8_MOD_CLK << MXC_F_SPIXFM_CFG_SSACT_POS) |
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#define | MXC_F_SPIXFM_CFG_SSIACT_POS 18 |
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#define | MXC_F_SPIXFM_CFG_SSIACT ((uint32_t)(0x3UL << MXC_F_SPIXFM_CFG_SSIACT_POS)) |
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#define | MXC_V_SPIXFM_CFG_SSIACT_FOR_1_MOD_CLK ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFM_CFG_SSIACT_FOR_1_MOD_CLK (MXC_V_SPIXFM_CFG_SSIACT_FOR_1_MOD_CLK << MXC_F_SPIXFM_CFG_SSIACT_POS) |
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#define | MXC_V_SPIXFM_CFG_SSIACT_FOR_3_MOD_CLK ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFM_CFG_SSIACT_FOR_3_MOD_CLK (MXC_V_SPIXFM_CFG_SSIACT_FOR_3_MOD_CLK << MXC_F_SPIXFM_CFG_SSIACT_POS) |
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#define | MXC_V_SPIXFM_CFG_SSIACT_FOR_5_MOD_CLK ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFM_CFG_SSIACT_FOR_5_MOD_CLK (MXC_V_SPIXFM_CFG_SSIACT_FOR_5_MOD_CLK << MXC_F_SPIXFM_CFG_SSIACT_POS) |
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#define | MXC_V_SPIXFM_CFG_SSIACT_FOR_9_MOD_CLK ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFM_CFG_SSIACT_FOR_9_MOD_CLK (MXC_V_SPIXFM_CFG_SSIACT_FOR_9_MOD_CLK << MXC_F_SPIXFM_CFG_SSIACT_POS) |
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#define | MXC_F_SPIXFM_FETCH_CTRL_CMDVAL_POS 0 |
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#define | MXC_F_SPIXFM_FETCH_CTRL_CMDVAL ((uint32_t)(0xFFUL << MXC_F_SPIXFM_FETCH_CTRL_CMDVAL_POS)) |
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#define | MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH_POS 8 |
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#define | MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH ((uint32_t)(0x3UL << MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH_POS)) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_CMD_WIDTH_SINGLE ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_CMD_WIDTH_SINGLE (MXC_V_SPIXFM_FETCH_CTRL_CMD_WIDTH_SINGLE << MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH_POS) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_CMD_WIDTH_DUAL_IO ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_CMD_WIDTH_DUAL_IO (MXC_V_SPIXFM_FETCH_CTRL_CMD_WIDTH_DUAL_IO << MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH_POS) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_CMD_WIDTH_QUAD_IO ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_CMD_WIDTH_QUAD_IO (MXC_V_SPIXFM_FETCH_CTRL_CMD_WIDTH_QUAD_IO << MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH_POS) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_CMD_WIDTH_INVALID ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_CMD_WIDTH_INVALID (MXC_V_SPIXFM_FETCH_CTRL_CMD_WIDTH_INVALID << MXC_F_SPIXFM_FETCH_CTRL_CMD_WIDTH_POS) |
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#define | MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH_POS 10 |
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#define | MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH ((uint32_t)(0x3UL << MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH_POS)) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_ADDR_WIDTH_SINGLE ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_ADDR_WIDTH_SINGLE (MXC_V_SPIXFM_FETCH_CTRL_ADDR_WIDTH_SINGLE << MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH_POS) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_ADDR_WIDTH_DUAL_IO ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_ADDR_WIDTH_DUAL_IO (MXC_V_SPIXFM_FETCH_CTRL_ADDR_WIDTH_DUAL_IO << MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH_POS) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_ADDR_WIDTH_QUAD_IO ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_ADDR_WIDTH_QUAD_IO (MXC_V_SPIXFM_FETCH_CTRL_ADDR_WIDTH_QUAD_IO << MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH_POS) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_ADDR_WIDTH_INVALID ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_ADDR_WIDTH_INVALID (MXC_V_SPIXFM_FETCH_CTRL_ADDR_WIDTH_INVALID << MXC_F_SPIXFM_FETCH_CTRL_ADDR_WIDTH_POS) |
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#define | MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH_POS 12 |
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#define | MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH ((uint32_t)(0x3UL << MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH_POS)) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_DATA_WIDTH_SINGLE ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_DATA_WIDTH_SINGLE (MXC_V_SPIXFM_FETCH_CTRL_DATA_WIDTH_SINGLE << MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH_POS) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_DATA_WIDTH_DUAL_IO ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_DATA_WIDTH_DUAL_IO (MXC_V_SPIXFM_FETCH_CTRL_DATA_WIDTH_DUAL_IO << MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH_POS) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_DATA_WIDTH_QUAD_IO ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_DATA_WIDTH_QUAD_IO (MXC_V_SPIXFM_FETCH_CTRL_DATA_WIDTH_QUAD_IO << MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH_POS) |
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#define | MXC_V_SPIXFM_FETCH_CTRL_DATA_WIDTH_INVALID ((uint32_t)0x3UL) |
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#define | MXC_S_SPIXFM_FETCH_CTRL_DATA_WIDTH_INVALID (MXC_V_SPIXFM_FETCH_CTRL_DATA_WIDTH_INVALID << MXC_F_SPIXFM_FETCH_CTRL_DATA_WIDTH_POS) |
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#define | MXC_F_SPIXFM_FETCH_CTRL_FOUR_BYTE_ADDR_POS 16 |
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#define | MXC_F_SPIXFM_FETCH_CTRL_FOUR_BYTE_ADDR ((uint32_t)(0x1UL << MXC_F_SPIXFM_FETCH_CTRL_FOUR_BYTE_ADDR_POS)) |
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#define | MXC_F_SPIXFM_MODE_CTRL_MDCLK_POS 0 |
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#define | MXC_F_SPIXFM_MODE_CTRL_MDCLK ((uint32_t)(0xFUL << MXC_F_SPIXFM_MODE_CTRL_MDCLK_POS)) |
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#define | MXC_F_SPIXFM_MODE_CTRL_NO_CMD_MODE_POS 8 |
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#define | MXC_F_SPIXFM_MODE_CTRL_NO_CMD_MODE ((uint32_t)(0x1UL << MXC_F_SPIXFM_MODE_CTRL_NO_CMD_MODE_POS)) |
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#define | MXC_F_SPIXFM_MODE_CTRL_EXIT_NO_CMD_MODE_POS 9 |
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#define | MXC_F_SPIXFM_MODE_CTRL_EXIT_NO_CMD_MODE ((uint32_t)(0x1UL << MXC_F_SPIXFM_MODE_CTRL_EXIT_NO_CMD_MODE_POS)) |
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#define | MXC_F_SPIXFM_MODE_DATA_DATA_POS 0 |
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#define | MXC_F_SPIXFM_MODE_DATA_DATA ((uint32_t)(0xFFFFUL << MXC_F_SPIXFM_MODE_DATA_DATA_POS)) |
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#define | MXC_F_SPIXFM_MODE_DATA_OUT_EN_POS 16 |
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#define | MXC_F_SPIXFM_MODE_DATA_OUT_EN ((uint32_t)(0xFFFFUL << MXC_F_SPIXFM_MODE_DATA_OUT_EN_POS)) |
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#define | MXC_F_SPIXFM_SCLK_FB_CTRL_FB_EN_POS 0 |
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#define | MXC_F_SPIXFM_SCLK_FB_CTRL_FB_EN ((uint32_t)(0x1UL << MXC_F_SPIXFM_SCLK_FB_CTRL_FB_EN_POS)) |
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#define | MXC_F_SPIXFM_SCLK_FB_CTRL_INVERT_EN_POS 1 |
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#define | MXC_F_SPIXFM_SCLK_FB_CTRL_INVERT_EN ((uint32_t)(0x1UL << MXC_F_SPIXFM_SCLK_FB_CTRL_INVERT_EN_POS)) |
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#define | MXC_F_SPIXFM_IO_CTRL_SCLK_DS_POS 0 |
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#define | MXC_F_SPIXFM_IO_CTRL_SCLK_DS ((uint32_t)(0x1UL << MXC_F_SPIXFM_IO_CTRL_SCLK_DS_POS)) |
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#define | MXC_F_SPIXFM_IO_CTRL_SS_DS_POS 1 |
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#define | MXC_F_SPIXFM_IO_CTRL_SS_DS ((uint32_t)(0x1UL << MXC_F_SPIXFM_IO_CTRL_SS_DS_POS)) |
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#define | MXC_F_SPIXFM_IO_CTRL_SDIO_DS_POS 2 |
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#define | MXC_F_SPIXFM_IO_CTRL_SDIO_DS ((uint32_t)(0x1UL << MXC_F_SPIXFM_IO_CTRL_SDIO_DS_POS)) |
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#define | MXC_F_SPIXFM_IO_CTRL_PU_PD_CTRL_POS 3 |
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#define | MXC_F_SPIXFM_IO_CTRL_PU_PD_CTRL ((uint32_t)(0x3UL << MXC_F_SPIXFM_IO_CTRL_PU_PD_CTRL_POS)) |
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#define | MXC_V_SPIXFM_IO_CTRL_PU_PD_CTRL_TRI_STATE ((uint32_t)0x0UL) |
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#define | MXC_S_SPIXFM_IO_CTRL_PU_PD_CTRL_TRI_STATE (MXC_V_SPIXFM_IO_CTRL_PU_PD_CTRL_TRI_STATE << MXC_F_SPIXFM_IO_CTRL_PU_PD_CTRL_POS) |
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#define | MXC_V_SPIXFM_IO_CTRL_PU_PD_CTRL_PULL_UP ((uint32_t)0x1UL) |
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#define | MXC_S_SPIXFM_IO_CTRL_PU_PD_CTRL_PULL_UP (MXC_V_SPIXFM_IO_CTRL_PU_PD_CTRL_PULL_UP << MXC_F_SPIXFM_IO_CTRL_PU_PD_CTRL_POS) |
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#define | MXC_V_SPIXFM_IO_CTRL_PU_PD_CTRL_PULL_DOWN ((uint32_t)0x2UL) |
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#define | MXC_S_SPIXFM_IO_CTRL_PU_PD_CTRL_PULL_DOWN (MXC_V_SPIXFM_IO_CTRL_PU_PD_CTRL_PULL_DOWN << MXC_F_SPIXFM_IO_CTRL_PU_PD_CTRL_POS) |
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#define | MXC_F_SPIXFM_MEMSECCN_DECEN_POS 0 |
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#define | MXC_F_SPIXFM_MEMSECCN_DECEN ((uint32_t)(0x1UL << MXC_F_SPIXFM_MEMSECCN_DECEN_POS)) |
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#define | MXC_F_SPIXFM_MEMSECCN_AUTH_DISABLE_POS 1 |
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#define | MXC_F_SPIXFM_MEMSECCN_AUTH_DISABLE ((uint32_t)(0x1UL << MXC_F_SPIXFM_MEMSECCN_AUTH_DISABLE_POS)) |
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#define | MXC_F_SPIXFM_MEMSECCN_CNTOPTIEN_POS 2 |
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#define | MXC_F_SPIXFM_MEMSECCN_CNTOPTIEN ((uint32_t)(0x1UL << MXC_F_SPIXFM_MEMSECCN_CNTOPTIEN_POS)) |
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#define | MXC_F_SPIXFM_MEMSECCN_INTERLDIS_POS 3 |
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#define | MXC_F_SPIXFM_MEMSECCN_INTERLDIS ((uint32_t)(0x1UL << MXC_F_SPIXFM_MEMSECCN_INTERLDIS_POS)) |
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#define | MXC_F_SPIXFM_MEMSECCN_AUTHERR_POS 4 |
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#define | MXC_F_SPIXFM_MEMSECCN_AUTHERR ((uint32_t)(0x1UL << MXC_F_SPIXFM_MEMSECCN_AUTHERR_POS)) |
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#define | MXC_F_SPIXFM_BUS_IDLE_BUSIDLE_POS 0 |
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#define | MXC_F_SPIXFM_BUS_IDLE_BUSIDLE ((uint32_t)(0xFFFFUL << MXC_F_SPIXFM_BUS_IDLE_BUSIDLE_POS)) |
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