MAX32670 Peripheral Driver API
Peripheral Driver API for the MAX32670
Register Offsets

Macros

#define MXC_R_AES_KEY_AES_KEY0   ((uint32_t)0x00000000UL)
 
#define MXC_R_AES_KEY_AES_KEY1   ((uint32_t)0x00000004UL)
 
#define MXC_R_AES_KEY_AES_KEY2   ((uint32_t)0x00000008UL)
 
#define MXC_R_AES_KEY_AES_KEY3   ((uint32_t)0x0000000CUL)
 
#define MXC_R_AES_KEY_AES_KEY4   ((uint32_t)0x00000010UL)
 
#define MXC_R_AES_KEY_AES_KEY5   ((uint32_t)0x00000014UL)
 
#define MXC_R_AES_KEY_AES_KEY6   ((uint32_t)0x00000018UL)
 
#define MXC_R_AES_KEY_AES_KEY7   ((uint32_t)0x0000001CUL)
 

Detailed Description

AES_KEY Peripheral Register Offsets from the AES_KEY Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_AES_KEY_AES_KEY0

#define MXC_R_AES_KEY_AES_KEY0   ((uint32_t)0x00000000UL)

Offset from AES_KEY Base Address: 0x0000

◆ MXC_R_AES_KEY_AES_KEY1

#define MXC_R_AES_KEY_AES_KEY1   ((uint32_t)0x00000004UL)

Offset from AES_KEY Base Address: 0x0004

◆ MXC_R_AES_KEY_AES_KEY2

#define MXC_R_AES_KEY_AES_KEY2   ((uint32_t)0x00000008UL)

Offset from AES_KEY Base Address: 0x0008

◆ MXC_R_AES_KEY_AES_KEY3

#define MXC_R_AES_KEY_AES_KEY3   ((uint32_t)0x0000000CUL)

Offset from AES_KEY Base Address: 0x000C

◆ MXC_R_AES_KEY_AES_KEY4

#define MXC_R_AES_KEY_AES_KEY4   ((uint32_t)0x00000010UL)

Offset from AES_KEY Base Address: 0x0010

◆ MXC_R_AES_KEY_AES_KEY5

#define MXC_R_AES_KEY_AES_KEY5   ((uint32_t)0x00000014UL)

Offset from AES_KEY Base Address: 0x0014

◆ MXC_R_AES_KEY_AES_KEY6

#define MXC_R_AES_KEY_AES_KEY6   ((uint32_t)0x00000018UL)

Offset from AES_KEY Base Address: 0x0018

◆ MXC_R_AES_KEY_AES_KEY7

#define MXC_R_AES_KEY_AES_KEY7   ((uint32_t)0x0000001CUL)

Offset from AES_KEY Base Address: 0x001C