I2C_RXCTRL0

Macros
#define	MXC_F_I2C_RXCTRL0_DNR_POS   0
#define	MXC_F_I2C_RXCTRL0_DNR   ((uint32_t)(0x1UL << MXC_F_I2C_RXCTRL0_DNR_POS))
#define	MXC_F_I2C_RXCTRL0_FLUSH_POS   7
#define	MXC_F_I2C_RXCTRL0_FLUSH   ((uint32_t)(0x1UL << MXC_F_I2C_RXCTRL0_FLUSH_POS))
#define	MXC_F_I2C_RXCTRL0_THD_LVL_POS   8
#define	MXC_F_I2C_RXCTRL0_THD_LVL   ((uint32_t)(0xFUL << MXC_F_I2C_RXCTRL0_THD_LVL_POS))

Detailed Description

Receive Control Register 0.

Macro Definition Documentation

MXC_F_I2C_RXCTRL0_DNR

#define MXC_F_I2C_RXCTRL0_DNR   ((uint32_t)(0x1UL << MXC_F_I2C_RXCTRL0_DNR_POS))

RXCTRL0_DNR Mask

MXC_F_I2C_RXCTRL0_DNR_POS

#define MXC_F_I2C_RXCTRL0_DNR_POS   0

RXCTRL0_DNR Position

MXC_F_I2C_RXCTRL0_FLUSH

#define MXC_F_I2C_RXCTRL0_FLUSH   ((uint32_t)(0x1UL << MXC_F_I2C_RXCTRL0_FLUSH_POS))

RXCTRL0_FLUSH Mask

MXC_F_I2C_RXCTRL0_FLUSH_POS

#define MXC_F_I2C_RXCTRL0_FLUSH_POS   7

RXCTRL0_FLUSH Position

MXC_F_I2C_RXCTRL0_THD_LVL

#define MXC_F_I2C_RXCTRL0_THD_LVL   ((uint32_t)(0xFUL << MXC_F_I2C_RXCTRL0_THD_LVL_POS))

RXCTRL0_THD_LVL Mask

MXC_F_I2C_RXCTRL0_THD_LVL_POS

#define MXC_F_I2C_RXCTRL0_THD_LVL_POS   8

RXCTRL0_THD_LVL Position