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MAX32672 Peripheral Driver API
Peripheral Driver API for the MAX32672
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ECC Enable Register.
#define MXC_F_ECC_EN_FL0 MXC_F_TRIMSIR_BB_SIR2_FL0ECCEN |
EN_FL0 Mask
#define MXC_F_ECC_EN_FL0_POS MXC_F_TRIMSIR_BB_SIR2_FL0ECCEN_POS |
EN_FL0 Position
#define MXC_F_ECC_EN_FL1 MXC_F_TRIMSIR_BB_SIR2_FL1ECCEN |
EN_FL1 Mask
#define MXC_F_ECC_EN_FL1_POS MXC_F_TRIMSIR_BB_SIR2_FL1ECCEN_POS |
EN_FL1 Position
#define MXC_F_ECC_EN_ICC0 MXC_F_TRIMSIR_BB_SIR2_ICC0ECCEN |
EN_ICC0 Mask
#define MXC_F_ECC_EN_ICC0_POS MXC_F_TRIMSIR_BB_SIR2_ICC0ECCEN_POS |
EN_ICC0 Position
#define MXC_F_ECC_EN_RAM0_1 MXC_F_TRIMSIR_BB_SIR2_RAM0_1ECCEN |
EN_RAM0_1 Mask
#define MXC_F_ECC_EN_RAM0_1_POS MXC_F_TRIMSIR_BB_SIR2_RAM0_1ECCEN_POS |
EN_RAM0_1 Position
#define MXC_F_ECC_EN_RAM2 MXC_F_TRIMSIR_BB_SIR2_RAM2ECCEN |
EN_RAM2 Mask
#define MXC_F_ECC_EN_RAM2_POS MXC_F_TRIMSIR_BB_SIR2_RAM2ECCEN_POS |
EN_RAM2 Position
#define MXC_F_ECC_EN_RAM3 MXC_F_TRIMSIR_BB_SIR2_RAM3ECCEN |
EN_RAM3 Mask
#define MXC_F_ECC_EN_RAM3_POS MXC_F_TRIMSIR_BB_SIR2_RAM3ECCEN_POS |
EN_RAM3 Position