FCR_FCTRL0

Macros
#define	MXC_F_FCR_FCTRL0_ERFO_RANGE_SEL_POS   0
#define	MXC_F_FCR_FCTRL0_ERFO_RANGE_SEL   ((uint32_t)(0x7UL << MXC_F_FCR_FCTRL0_ERFO_RANGE_SEL_POS))
#define	MXC_F_FCR_FCTRL0_KEYWIPE_SYS_POS   8
#define	MXC_F_FCR_FCTRL0_KEYWIPE_SYS   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_KEYWIPE_SYS_POS))
#define	MXC_F_FCR_FCTRL0_I2C0_SDA_FILTER_EN_POS   20
#define	MXC_F_FCR_FCTRL0_I2C0_SDA_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C0_SDA_FILTER_EN_POS))
#define	MXC_F_FCR_FCTRL0_I2C0_SCL_FILTER_EN_POS   21
#define	MXC_F_FCR_FCTRL0_I2C0_SCL_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C0_SCL_FILTER_EN_POS))
#define	MXC_F_FCR_FCTRL0_I2C1_SDA_FILTER_EN_POS   22
#define	MXC_F_FCR_FCTRL0_I2C1_SDA_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C1_SDA_FILTER_EN_POS))
#define	MXC_F_FCR_FCTRL0_I2C1_SCL_FILTER_EN_POS   23
#define	MXC_F_FCR_FCTRL0_I2C1_SCL_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C1_SCL_FILTER_EN_POS))
#define	MXC_F_FCR_FCTRL0_I2C2_SDA_FILTER_EN_POS   24
#define	MXC_F_FCR_FCTRL0_I2C2_SDA_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C2_SDA_FILTER_EN_POS))
#define	MXC_F_FCR_FCTRL0_I2C2_SCL_FILTER_EN_POS   25
#define	MXC_F_FCR_FCTRL0_I2C2_SCL_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C2_SCL_FILTER_EN_POS))

Detailed Description

Register 0.

Macro Definition Documentation

MXC_F_FCR_FCTRL0_ERFO_RANGE_SEL

#define MXC_F_FCR_FCTRL0_ERFO_RANGE_SEL   ((uint32_t)(0x7UL << MXC_F_FCR_FCTRL0_ERFO_RANGE_SEL_POS))

FCTRL0_ERFO_RANGE_SEL Mask

MXC_F_FCR_FCTRL0_ERFO_RANGE_SEL_POS

#define MXC_F_FCR_FCTRL0_ERFO_RANGE_SEL_POS   0

FCTRL0_ERFO_RANGE_SEL Position

MXC_F_FCR_FCTRL0_I2C0_SCL_FILTER_EN

#define MXC_F_FCR_FCTRL0_I2C0_SCL_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C0_SCL_FILTER_EN_POS))

FCTRL0_I2C0_SCL_FILTER_EN Mask

MXC_F_FCR_FCTRL0_I2C0_SCL_FILTER_EN_POS

#define MXC_F_FCR_FCTRL0_I2C0_SCL_FILTER_EN_POS   21

FCTRL0_I2C0_SCL_FILTER_EN Position

MXC_F_FCR_FCTRL0_I2C0_SDA_FILTER_EN

#define MXC_F_FCR_FCTRL0_I2C0_SDA_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C0_SDA_FILTER_EN_POS))

FCTRL0_I2C0_SDA_FILTER_EN Mask

MXC_F_FCR_FCTRL0_I2C0_SDA_FILTER_EN_POS

#define MXC_F_FCR_FCTRL0_I2C0_SDA_FILTER_EN_POS   20

FCTRL0_I2C0_SDA_FILTER_EN Position

MXC_F_FCR_FCTRL0_I2C1_SCL_FILTER_EN

#define MXC_F_FCR_FCTRL0_I2C1_SCL_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C1_SCL_FILTER_EN_POS))

FCTRL0_I2C1_SCL_FILTER_EN Mask

MXC_F_FCR_FCTRL0_I2C1_SCL_FILTER_EN_POS

#define MXC_F_FCR_FCTRL0_I2C1_SCL_FILTER_EN_POS   23

FCTRL0_I2C1_SCL_FILTER_EN Position

MXC_F_FCR_FCTRL0_I2C1_SDA_FILTER_EN

#define MXC_F_FCR_FCTRL0_I2C1_SDA_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C1_SDA_FILTER_EN_POS))

FCTRL0_I2C1_SDA_FILTER_EN Mask

MXC_F_FCR_FCTRL0_I2C1_SDA_FILTER_EN_POS

#define MXC_F_FCR_FCTRL0_I2C1_SDA_FILTER_EN_POS   22

FCTRL0_I2C1_SDA_FILTER_EN Position

MXC_F_FCR_FCTRL0_I2C2_SCL_FILTER_EN

#define MXC_F_FCR_FCTRL0_I2C2_SCL_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C2_SCL_FILTER_EN_POS))

FCTRL0_I2C2_SCL_FILTER_EN Mask

MXC_F_FCR_FCTRL0_I2C2_SCL_FILTER_EN_POS

#define MXC_F_FCR_FCTRL0_I2C2_SCL_FILTER_EN_POS   25

FCTRL0_I2C2_SCL_FILTER_EN Position

MXC_F_FCR_FCTRL0_I2C2_SDA_FILTER_EN

#define MXC_F_FCR_FCTRL0_I2C2_SDA_FILTER_EN   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C2_SDA_FILTER_EN_POS))

FCTRL0_I2C2_SDA_FILTER_EN Mask

MXC_F_FCR_FCTRL0_I2C2_SDA_FILTER_EN_POS

#define MXC_F_FCR_FCTRL0_I2C2_SDA_FILTER_EN_POS   24

FCTRL0_I2C2_SDA_FILTER_EN Position

MXC_F_FCR_FCTRL0_KEYWIPE_SYS

#define MXC_F_FCR_FCTRL0_KEYWIPE_SYS   ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_KEYWIPE_SYS_POS))

FCTRL0_KEYWIPE_SYS Mask

MXC_F_FCR_FCTRL0_KEYWIPE_SYS_POS

#define MXC_F_FCR_FCTRL0_KEYWIPE_SYS_POS   8

FCTRL0_KEYWIPE_SYS Position