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    MAX32672 Peripheral Driver API
    
   Peripheral Driver API for the MAX32672 
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Macros | |
| #define | MXC_F_GPIO_EN1_GPIO_EN1_POS 0 | 
| #define | MXC_F_GPIO_EN1_GPIO_EN1 ((uint32_t)(0xFFFFFFFFUL << MXC_F_GPIO_EN1_GPIO_EN1_POS)) | 
| #define | MXC_V_GPIO_EN1_GPIO_EN1_PRIMARY ((uint32_t)0x0UL) | 
| #define | MXC_S_GPIO_EN1_GPIO_EN1_PRIMARY (MXC_V_GPIO_EN1_GPIO_EN1_PRIMARY << MXC_F_GPIO_EN1_GPIO_EN1_POS) | 
| #define | MXC_V_GPIO_EN1_GPIO_EN1_SECONDARY ((uint32_t)0x1UL) | 
| #define | MXC_S_GPIO_EN1_GPIO_EN1_SECONDARY (MXC_V_GPIO_EN1_GPIO_EN1_SECONDARY << MXC_F_GPIO_EN1_GPIO_EN1_POS) | 
GPIO Alternate Function Enable Register. Each bit in this register selects between primary/secondary functions for the associated GPIO pin in this port.
| #define MXC_F_GPIO_EN1_GPIO_EN1 ((uint32_t)(0xFFFFFFFFUL << MXC_F_GPIO_EN1_GPIO_EN1_POS)) | 
EN1_GPIO_EN1 Mask
| #define MXC_F_GPIO_EN1_GPIO_EN1_POS 0 | 
EN1_GPIO_EN1 Position
| #define MXC_S_GPIO_EN1_GPIO_EN1_PRIMARY (MXC_V_GPIO_EN1_GPIO_EN1_PRIMARY << MXC_F_GPIO_EN1_GPIO_EN1_POS) | 
EN1_GPIO_EN1_PRIMARY Setting
| #define MXC_S_GPIO_EN1_GPIO_EN1_SECONDARY (MXC_V_GPIO_EN1_GPIO_EN1_SECONDARY << MXC_F_GPIO_EN1_GPIO_EN1_POS) | 
EN1_GPIO_EN1_SECONDARY Setting
| #define MXC_V_GPIO_EN1_GPIO_EN1_PRIMARY ((uint32_t)0x0UL) | 
EN1_GPIO_EN1_PRIMARY Value
| #define MXC_V_GPIO_EN1_GPIO_EN1_SECONDARY ((uint32_t)0x1UL) | 
EN1_GPIO_EN1_SECONDARY Value