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MAX32672 Peripheral Driver API
Peripheral Driver API for the MAX32672
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Macros | |
#define | MXC_F_MCR_RST_LPTMR0_POS 0 |
#define | MXC_F_MCR_RST_LPTMR0 ((uint32_t)(0x1UL << MXC_F_MCR_RST_LPTMR0_POS)) |
#define | MXC_F_MCR_RST_LPTMR1_POS 1 |
#define | MXC_F_MCR_RST_LPTMR1 ((uint32_t)(0x1UL << MXC_F_MCR_RST_LPTMR1_POS)) |
#define | MXC_F_MCR_RST_LPUART0_POS 2 |
#define | MXC_F_MCR_RST_LPUART0 ((uint32_t)(0x1UL << MXC_F_MCR_RST_LPUART0_POS)) |
#define | MXC_F_MCR_RST_RTC_POS 3 |
#define | MXC_F_MCR_RST_RTC ((uint32_t)(0x1UL << MXC_F_MCR_RST_RTC_POS)) |
Low Power Reset Control Register.
#define MXC_F_MCR_RST_LPTMR0 ((uint32_t)(0x1UL << MXC_F_MCR_RST_LPTMR0_POS)) |
RST_LPTMR0 Mask
#define MXC_F_MCR_RST_LPTMR0_POS 0 |
RST_LPTMR0 Position
#define MXC_F_MCR_RST_LPTMR1 ((uint32_t)(0x1UL << MXC_F_MCR_RST_LPTMR1_POS)) |
RST_LPTMR1 Mask
#define MXC_F_MCR_RST_LPTMR1_POS 1 |
RST_LPTMR1 Position
#define MXC_F_MCR_RST_LPUART0 ((uint32_t)(0x1UL << MXC_F_MCR_RST_LPUART0_POS)) |
RST_LPUART0 Mask
#define MXC_F_MCR_RST_LPUART0_POS 2 |
RST_LPUART0 Position
#define MXC_F_MCR_RST_RTC ((uint32_t)(0x1UL << MXC_F_MCR_RST_RTC_POS)) |
RST_RTC Mask
#define MXC_F_MCR_RST_RTC_POS 3 |
RST_RTC Position