Macros
#define	MXC_R_QDEC_CTRL ((uint32_t)0x00000000UL)

#define	MXC_R_QDEC_INTFL ((uint32_t)0x00000004UL)

#define	MXC_R_QDEC_INTEN ((uint32_t)0x00000008UL)

#define	MXC_R_QDEC_MAXCNT ((uint32_t)0x0000000CUL)

#define	MXC_R_QDEC_INITIAL ((uint32_t)0x00000010UL)

#define	MXC_R_QDEC_COMPARE ((uint32_t)0x00000014UL)

#define	MXC_R_QDEC_INDEX ((uint32_t)0x00000018UL)

#define	MXC_R_QDEC_CAPTURE ((uint32_t)0x0000001CUL)

#define	MXC_R_QDEC_STATUS ((uint32_t)0x00000020UL)

#define	MXC_R_QDEC_POSITION ((uint32_t)0x00000024UL)

#define	MXC_R_QDEC_CAPDLY ((uint32_t)0x00000028UL)

Detailed Description

QDEC Peripheral Register Offsets from the QDEC Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_QDEC_CAPDLY

#define MXC_R_QDEC_CAPDLY ((uint32_t)0x00000028UL)

Offset from QDEC Base Address: 0x0028

◆ MXC_R_QDEC_CAPTURE

#define MXC_R_QDEC_CAPTURE ((uint32_t)0x0000001CUL)

Offset from QDEC Base Address: 0x001C

◆ MXC_R_QDEC_COMPARE

#define MXC_R_QDEC_COMPARE ((uint32_t)0x00000014UL)

Offset from QDEC Base Address: 0x0014

◆ MXC_R_QDEC_CTRL

#define MXC_R_QDEC_CTRL ((uint32_t)0x00000000UL)

Offset from QDEC Base Address: 0x0000

◆ MXC_R_QDEC_INDEX

#define MXC_R_QDEC_INDEX ((uint32_t)0x00000018UL)

Offset from QDEC Base Address: 0x0018

◆ MXC_R_QDEC_INITIAL

#define MXC_R_QDEC_INITIAL ((uint32_t)0x00000010UL)

Offset from QDEC Base Address: 0x0010

◆ MXC_R_QDEC_INTEN

#define MXC_R_QDEC_INTEN ((uint32_t)0x00000008UL)

Offset from QDEC Base Address: 0x0008

◆ MXC_R_QDEC_INTFL

#define MXC_R_QDEC_INTFL ((uint32_t)0x00000004UL)

Offset from QDEC Base Address: 0x0004

◆ MXC_R_QDEC_MAXCNT

#define MXC_R_QDEC_MAXCNT ((uint32_t)0x0000000CUL)

Offset from QDEC Base Address: 0x000C

◆ MXC_R_QDEC_POSITION

#define MXC_R_QDEC_POSITION ((uint32_t)0x00000024UL)

Offset from QDEC Base Address: 0x0024

◆ MXC_R_QDEC_STATUS

#define MXC_R_QDEC_STATUS ((uint32_t)0x00000020UL)

Offset from QDEC Base Address: 0x0020

Macros