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MAX32672 Peripheral Driver API
Peripheral Driver API for the MAX32672
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Register for controlling SPI peripheral.
#define MXC_F_SPI_CTRL2_CLKPHA ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_CLKPHA_POS)) |
CTRL2_CLKPHA Mask
#define MXC_F_SPI_CTRL2_CLKPHA_POS 0 |
CTRL2_CLKPHA Position
#define MXC_F_SPI_CTRL2_CLKPOL ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_CLKPOL_POS)) |
CTRL2_CLKPOL Mask
#define MXC_F_SPI_CTRL2_CLKPOL_POS 1 |
CTRL2_CLKPOL Position
#define MXC_F_SPI_CTRL2_DATA_WIDTH ((uint32_t)(0x3UL << MXC_F_SPI_CTRL2_DATA_WIDTH_POS)) |
CTRL2_DATA_WIDTH Mask
#define MXC_F_SPI_CTRL2_DATA_WIDTH_POS 12 |
CTRL2_DATA_WIDTH Position
#define MXC_F_SPI_CTRL2_NUMBITS ((uint32_t)(0xFUL << MXC_F_SPI_CTRL2_NUMBITS_POS)) |
CTRL2_NUMBITS Mask
#define MXC_F_SPI_CTRL2_NUMBITS_POS 8 |
CTRL2_NUMBITS Position
#define MXC_F_SPI_CTRL2_SCLK_FB_INV ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_SCLK_FB_INV_POS)) |
CTRL2_SCLK_FB_INV Mask
#define MXC_F_SPI_CTRL2_SCLK_FB_INV_POS 4 |
CTRL2_SCLK_FB_INV Position
#define MXC_F_SPI_CTRL2_SS_POL ((uint32_t)(0xFFUL << MXC_F_SPI_CTRL2_SS_POL_POS)) |
CTRL2_SS_POL Mask
#define MXC_F_SPI_CTRL2_SS_POL_POS 16 |
CTRL2_SS_POL Position
#define MXC_F_SPI_CTRL2_THREE_WIRE ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_THREE_WIRE_POS)) |
CTRL2_THREE_WIRE Mask
#define MXC_F_SPI_CTRL2_THREE_WIRE_POS 15 |
CTRL2_THREE_WIRE Position
#define MXC_S_SPI_CTRL2_DATA_WIDTH_DUAL (MXC_V_SPI_CTRL2_DATA_WIDTH_DUAL << MXC_F_SPI_CTRL2_DATA_WIDTH_POS) |
CTRL2_DATA_WIDTH_DUAL Setting
#define MXC_S_SPI_CTRL2_DATA_WIDTH_MONO (MXC_V_SPI_CTRL2_DATA_WIDTH_MONO << MXC_F_SPI_CTRL2_DATA_WIDTH_POS) |
CTRL2_DATA_WIDTH_MONO Setting
#define MXC_S_SPI_CTRL2_DATA_WIDTH_QUAD (MXC_V_SPI_CTRL2_DATA_WIDTH_QUAD << MXC_F_SPI_CTRL2_DATA_WIDTH_POS) |
CTRL2_DATA_WIDTH_QUAD Setting
#define MXC_S_SPI_CTRL2_NUMBITS_0 (MXC_V_SPI_CTRL2_NUMBITS_0 << MXC_F_SPI_CTRL2_NUMBITS_POS) |
CTRL2_NUMBITS_0 Setting
#define MXC_S_SPI_CTRL2_SS_POL_SS0_HIGH (MXC_V_SPI_CTRL2_SS_POL_SS0_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS) |
CTRL2_SS_POL_SS0_HIGH Setting
#define MXC_S_SPI_CTRL2_SS_POL_SS1_HIGH (MXC_V_SPI_CTRL2_SS_POL_SS1_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS) |
CTRL2_SS_POL_SS1_HIGH Setting
#define MXC_S_SPI_CTRL2_SS_POL_SS2_HIGH (MXC_V_SPI_CTRL2_SS_POL_SS2_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS) |
CTRL2_SS_POL_SS2_HIGH Setting
#define MXC_S_SPI_CTRL2_SS_POL_SS3_HIGH (MXC_V_SPI_CTRL2_SS_POL_SS3_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS) |
CTRL2_SS_POL_SS3_HIGH Setting
#define MXC_V_SPI_CTRL2_DATA_WIDTH_DUAL ((uint32_t)0x1UL) |
CTRL2_DATA_WIDTH_DUAL Value
#define MXC_V_SPI_CTRL2_DATA_WIDTH_MONO ((uint32_t)0x0UL) |
CTRL2_DATA_WIDTH_MONO Value
#define MXC_V_SPI_CTRL2_DATA_WIDTH_QUAD ((uint32_t)0x2UL) |
CTRL2_DATA_WIDTH_QUAD Value
#define MXC_V_SPI_CTRL2_NUMBITS_0 ((uint32_t)0x0UL) |
CTRL2_NUMBITS_0 Value
#define MXC_V_SPI_CTRL2_SS_POL_SS0_HIGH ((uint32_t)0x1UL) |
CTRL2_SS_POL_SS0_HIGH Value
#define MXC_V_SPI_CTRL2_SS_POL_SS1_HIGH ((uint32_t)0x2UL) |
CTRL2_SS_POL_SS1_HIGH Value
#define MXC_V_SPI_CTRL2_SS_POL_SS2_HIGH ((uint32_t)0x4UL) |
CTRL2_SS_POL_SS2_HIGH Value
#define MXC_V_SPI_CTRL2_SS_POL_SS3_HIGH ((uint32_t)0x8UL) |
CTRL2_SS_POL_SS3_HIGH Value