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#define | MXC_R_AFE_DAC_CTRL ((uint32_t)0x01000004UL) |
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#define | MXC_R_AFE_DAC_RATE ((uint32_t)0x01010004UL) |
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#define | MXC_R_AFE_DAC_INT ((uint32_t)0x01020004UL) |
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#define | MXC_R_AFE_DAC_REG ((uint32_t)0x01030004UL) |
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#define | MXC_R_AFE_DAC_TRIM ((uint32_t)0x01040004UL) |
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#define | MXC_R_AFE_DAC_VREF_CTRL ((uint32_t)0x01050002UL) |
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#define | MXC_R_AFE_DAC_FIFO ((uint32_t)0x01060002UL) |
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#define | MXC_R_AFE_DAC_VREF_TRIM ((uint32_t)0x01070002UL) |
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#define | MXC_F_AFE_DAC_CTRL_FIFO_AE_CNT_POS 0 |
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#define | MXC_F_AFE_DAC_CTRL_FIFO_AE_CNT ((uint32_t)(0xFUL << MXC_F_AFE_DAC_CTRL_FIFO_AE_CNT_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_FIFO_ALMOST_FULL_POS 5 |
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#define | MXC_F_AFE_DAC_CTRL_FIFO_ALMOST_FULL ((uint32_t)(0x1UL << MXC_F_AFE_DAC_CTRL_FIFO_ALMOST_FULL_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_FIFO_EMPTY_POS 6 |
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#define | MXC_F_AFE_DAC_CTRL_FIFO_EMPTY ((uint32_t)(0x1UL << MXC_F_AFE_DAC_CTRL_FIFO_EMPTY_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_FIFO_ALMOST_EMPTY_POS 7 |
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#define | MXC_F_AFE_DAC_CTRL_FIFO_ALMOST_EMPTY ((uint32_t)(0x1UL << MXC_F_AFE_DAC_CTRL_FIFO_ALMOST_EMPTY_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_INTERP_MODE_POS 8 |
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#define | MXC_F_AFE_DAC_CTRL_INTERP_MODE ((uint32_t)(0x7UL << MXC_F_AFE_DAC_CTRL_INTERP_MODE_POS)) |
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#define | MXC_V_AFE_DAC_CTRL_INTERP_MODE_DISABLED ((uint32_t)0x0UL) |
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#define | MXC_S_AFE_DAC_CTRL_INTERP_MODE_DISABLED (MXC_V_AFE_DAC_CTRL_INTERP_MODE_DISABLED << MXC_F_AFE_DAC_CTRL_INTERP_MODE_POS) |
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#define | MXC_V_AFE_DAC_CTRL_INTERP_MODE_2_TO_1_INTERPOLATION ((uint32_t)0x1UL) |
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#define | MXC_S_AFE_DAC_CTRL_INTERP_MODE_2_TO_1_INTERPOLATION (MXC_V_AFE_DAC_CTRL_INTERP_MODE_2_TO_1_INTERPOLATION << MXC_F_AFE_DAC_CTRL_INTERP_MODE_POS) |
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#define | MXC_V_AFE_DAC_CTRL_INTERP_MODE_4_TO_1_INTERPOLATION ((uint32_t)0x2UL) |
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#define | MXC_S_AFE_DAC_CTRL_INTERP_MODE_4_TO_1_INTERPOLATION (MXC_V_AFE_DAC_CTRL_INTERP_MODE_4_TO_1_INTERPOLATION << MXC_F_AFE_DAC_CTRL_INTERP_MODE_POS) |
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#define | MXC_V_AFE_DAC_CTRL_INTERP_MODE_8_TO_1_INTERPOLATION ((uint32_t)0x3UL) |
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#define | MXC_S_AFE_DAC_CTRL_INTERP_MODE_8_TO_1_INTERPOLATION (MXC_V_AFE_DAC_CTRL_INTERP_MODE_8_TO_1_INTERPOLATION << MXC_F_AFE_DAC_CTRL_INTERP_MODE_POS) |
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#define | MXC_F_AFE_DAC_CTRL_FIFO_AF_CNT_POS 12 |
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#define | MXC_F_AFE_DAC_CTRL_FIFO_AF_CNT ((uint32_t)(0xFUL << MXC_F_AFE_DAC_CTRL_FIFO_AF_CNT_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_START_MODE_POS 16 |
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#define | MXC_F_AFE_DAC_CTRL_START_MODE ((uint32_t)(0x3UL << MXC_F_AFE_DAC_CTRL_START_MODE_POS)) |
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#define | MXC_V_AFE_DAC_CTRL_START_MODE_START_WHEN_FIFO_NOT_EMPTY ((uint32_t)0x0UL) |
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#define | MXC_S_AFE_DAC_CTRL_START_MODE_START_WHEN_FIFO_NOT_EMPTY (MXC_V_AFE_DAC_CTRL_START_MODE_START_WHEN_FIFO_NOT_EMPTY << MXC_F_AFE_DAC_CTRL_START_MODE_POS) |
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#define | MXC_V_AFE_DAC_CTRL_START_MODE_START_ON_ADC_START_STROBE ((uint32_t)0x1UL) |
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#define | MXC_S_AFE_DAC_CTRL_START_MODE_START_ON_ADC_START_STROBE (MXC_V_AFE_DAC_CTRL_START_MODE_START_ON_ADC_START_STROBE << MXC_F_AFE_DAC_CTRL_START_MODE_POS) |
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#define | MXC_V_AFE_DAC_CTRL_START_MODE_START_WHEN_CPU_START_WRITTEN ((uint32_t)0x2UL) |
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#define | MXC_S_AFE_DAC_CTRL_START_MODE_START_WHEN_CPU_START_WRITTEN (MXC_V_AFE_DAC_CTRL_START_MODE_START_WHEN_CPU_START_WRITTEN << MXC_F_AFE_DAC_CTRL_START_MODE_POS) |
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#define | MXC_V_AFE_DAC_CTRL_START_MODE_RESERVED ((uint32_t)0x3UL) |
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#define | MXC_S_AFE_DAC_CTRL_START_MODE_RESERVED (MXC_V_AFE_DAC_CTRL_START_MODE_RESERVED << MXC_F_AFE_DAC_CTRL_START_MODE_POS) |
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#define | MXC_F_AFE_DAC_CTRL_ACTIVE_POS 18 |
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#define | MXC_F_AFE_DAC_CTRL_ACTIVE ((uint32_t)(0x1UL << MXC_F_AFE_DAC_CTRL_ACTIVE_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_BIN2GRAY_BYPASS_POS 19 |
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#define | MXC_F_AFE_DAC_CTRL_BIN2GRAY_BYPASS ((uint32_t)(0x1UL << MXC_F_AFE_DAC_CTRL_BIN2GRAY_BYPASS_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_CPU_START_POS 20 |
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#define | MXC_F_AFE_DAC_CTRL_CPU_START ((uint32_t)(0x1UL << MXC_F_AFE_DAC_CTRL_CPU_START_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_OP_MODE_POS 24 |
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#define | MXC_F_AFE_DAC_CTRL_OP_MODE ((uint32_t)(0x3UL << MXC_F_AFE_DAC_CTRL_OP_MODE_POS)) |
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#define | MXC_V_AFE_DAC_CTRL_OP_MODE_OUTPUT_WHEN_FIFO_AVAIL ((uint32_t)0x0UL) |
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#define | MXC_S_AFE_DAC_CTRL_OP_MODE_OUTPUT_WHEN_FIFO_AVAIL (MXC_V_AFE_DAC_CTRL_OP_MODE_OUTPUT_WHEN_FIFO_AVAIL << MXC_F_AFE_DAC_CTRL_OP_MODE_POS) |
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#define | MXC_V_AFE_DAC_CTRL_OP_MODE_OUTPUT_ONCE_AT_RATE_CNT ((uint32_t)0x1UL) |
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#define | MXC_S_AFE_DAC_CTRL_OP_MODE_OUTPUT_ONCE_AT_RATE_CNT (MXC_V_AFE_DAC_CTRL_OP_MODE_OUTPUT_ONCE_AT_RATE_CNT << MXC_F_AFE_DAC_CTRL_OP_MODE_POS) |
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#define | MXC_V_AFE_DAC_CTRL_OP_MODE_RESERVED ((uint32_t)0x2UL) |
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#define | MXC_S_AFE_DAC_CTRL_OP_MODE_RESERVED (MXC_V_AFE_DAC_CTRL_OP_MODE_RESERVED << MXC_F_AFE_DAC_CTRL_OP_MODE_POS) |
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#define | MXC_V_AFE_DAC_CTRL_OP_MODE_OUTPUT_SAMPLE_CNT_AT_RATE_CNT ((uint32_t)0x3UL) |
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#define | MXC_S_AFE_DAC_CTRL_OP_MODE_OUTPUT_SAMPLE_CNT_AT_RATE_CNT (MXC_V_AFE_DAC_CTRL_OP_MODE_OUTPUT_SAMPLE_CNT_AT_RATE_CNT << MXC_F_AFE_DAC_CTRL_OP_MODE_POS) |
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#define | MXC_F_AFE_DAC_CTRL_POWER_MODE_1_0_POS 26 |
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#define | MXC_F_AFE_DAC_CTRL_POWER_MODE_1_0 ((uint32_t)(0x3UL << MXC_F_AFE_DAC_CTRL_POWER_MODE_1_0_POS)) |
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#define | MXC_V_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL0 ((uint32_t)0x1UL) |
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#define | MXC_S_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL0 (MXC_V_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL0 << MXC_F_AFE_DAC_CTRL_POWER_MODE_1_0_POS) |
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#define | MXC_V_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL1 ((uint32_t)0x3UL) |
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#define | MXC_S_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL1 (MXC_V_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL1 << MXC_F_AFE_DAC_CTRL_POWER_MODE_1_0_POS) |
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#define | MXC_V_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL2 ((uint32_t)0x1UL) |
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#define | MXC_S_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL2 (MXC_V_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL2 << MXC_F_AFE_DAC_CTRL_POWER_MODE_1_0_POS) |
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#define | MXC_V_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL3 ((uint32_t)0x3UL) |
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#define | MXC_S_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL3 (MXC_V_AFE_DAC_CTRL_POWER_MODE_1_0_POWLVL3 << MXC_F_AFE_DAC_CTRL_POWER_MODE_1_0_POS) |
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#define | MXC_F_AFE_DAC_CTRL_POWER_ON_POS 28 |
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#define | MXC_F_AFE_DAC_CTRL_POWER_ON ((uint32_t)(0x1UL << MXC_F_AFE_DAC_CTRL_POWER_ON_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_CLOCK_GATE_EN_POS 29 |
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#define | MXC_F_AFE_DAC_CTRL_CLOCK_GATE_EN ((uint32_t)(0x1UL << MXC_F_AFE_DAC_CTRL_CLOCK_GATE_EN_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_POWER_MODE_2_POS 30 |
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#define | MXC_F_AFE_DAC_CTRL_POWER_MODE_2 ((uint32_t)(0x1UL << MXC_F_AFE_DAC_CTRL_POWER_MODE_2_POS)) |
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#define | MXC_F_AFE_DAC_CTRL_RESET_POS 31 |
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#define | MXC_F_AFE_DAC_CTRL_RESET ((uint32_t)(0x1UL << MXC_F_AFE_DAC_CTRL_RESET_POS)) |
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#define | MXC_F_AFE_DAC_RATE_RATE_CNT_POS 0 |
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#define | MXC_F_AFE_DAC_RATE_RATE_CNT ((uint32_t)(0xFFFFUL << MXC_F_AFE_DAC_RATE_RATE_CNT_POS)) |
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#define | MXC_F_AFE_DAC_RATE_SAMPLE_CNT_POS 16 |
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#define | MXC_F_AFE_DAC_RATE_SAMPLE_CNT ((uint32_t)(0xFFFFUL << MXC_F_AFE_DAC_RATE_SAMPLE_CNT_POS)) |
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#define | MXC_F_AFE_DAC_INT_OUT_DONE_IF_POS 0 |
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#define | MXC_F_AFE_DAC_INT_OUT_DONE_IF ((uint32_t)(0x1UL << MXC_F_AFE_DAC_INT_OUT_DONE_IF_POS)) |
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#define | MXC_F_AFE_DAC_INT_UNDERFLOW_IF_POS 1 |
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#define | MXC_F_AFE_DAC_INT_UNDERFLOW_IF ((uint32_t)(0x1UL << MXC_F_AFE_DAC_INT_UNDERFLOW_IF_POS)) |
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#define | MXC_F_AFE_DAC_INT_ALMOST_EMPTY_IF_POS 2 |
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#define | MXC_F_AFE_DAC_INT_ALMOST_EMPTY_IF ((uint32_t)(0x1UL << MXC_F_AFE_DAC_INT_ALMOST_EMPTY_IF_POS)) |
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#define | MXC_F_AFE_DAC_INT_UNDERLFOW_POS 3 |
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#define | MXC_F_AFE_DAC_INT_UNDERLFOW ((uint32_t)(0x1UL << MXC_F_AFE_DAC_INT_UNDERLFOW_POS)) |
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#define | MXC_F_AFE_DAC_INT_OUT_DONE_IE_POS 16 |
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#define | MXC_F_AFE_DAC_INT_OUT_DONE_IE ((uint32_t)(0x1UL << MXC_F_AFE_DAC_INT_OUT_DONE_IE_POS)) |
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#define | MXC_F_AFE_DAC_INT_UNDERFLOW_IE_POS 17 |
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#define | MXC_F_AFE_DAC_INT_UNDERFLOW_IE ((uint32_t)(0x1UL << MXC_F_AFE_DAC_INT_UNDERFLOW_IE_POS)) |
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#define | MXC_F_AFE_DAC_INT_AHB_CG_DISABLE_POS 28 |
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#define | MXC_F_AFE_DAC_INT_AHB_CG_DISABLE ((uint32_t)(0x1UL << MXC_F_AFE_DAC_INT_AHB_CG_DISABLE_POS)) |
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#define | MXC_F_AFE_DAC_INT_APB_CG_DISABLE_POS 29 |
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#define | MXC_F_AFE_DAC_INT_APB_CG_DISABLE ((uint32_t)(0x1UL << MXC_F_AFE_DAC_INT_APB_CG_DISABLE_POS)) |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REF_DAC_FAST_PD_POS 0 |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REF_DAC_FAST_PD ((uint16_t)(0x1UL << MXC_F_AFE_DAC_VREF_CTRL_REF_DAC_FAST_PD_POS)) |
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#define | MXC_F_AFE_DAC_VREF_CTRL_DACREFSEL_POS 1 |
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#define | MXC_F_AFE_DAC_VREF_CTRL_DACREFSEL ((uint16_t)(0x3UL << MXC_F_AFE_DAC_VREF_CTRL_DACREFSEL_POS)) |
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#define | MXC_V_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_1_024 ((uint16_t)0x0UL) |
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#define | MXC_S_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_1_024 (MXC_V_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_1_024 << MXC_F_AFE_DAC_VREF_CTRL_DACREFSEL_POS) |
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#define | MXC_V_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_1_500 ((uint16_t)0x1UL) |
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#define | MXC_S_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_1_500 (MXC_V_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_1_500 << MXC_F_AFE_DAC_VREF_CTRL_DACREFSEL_POS) |
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#define | MXC_V_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_2_048 ((uint16_t)0x2UL) |
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#define | MXC_S_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_2_048 (MXC_V_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_2_048 << MXC_F_AFE_DAC_VREF_CTRL_DACREFSEL_POS) |
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#define | MXC_V_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_2_500 ((uint16_t)0x3UL) |
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#define | MXC_S_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_2_500 (MXC_V_AFE_DAC_VREF_CTRL_DACREFSEL_VOLTS_2_500 << MXC_F_AFE_DAC_VREF_CTRL_DACREFSEL_POS) |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REFDAC_OUTEN_POS 3 |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REFDAC_OUTEN ((uint16_t)(0x1UL << MXC_F_AFE_DAC_VREF_CTRL_REFDAC_OUTEN_POS)) |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REF_PU_POS 4 |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REF_PU ((uint16_t)(0x1UL << MXC_F_AFE_DAC_VREF_CTRL_REF_PU_POS)) |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REFDAC_CP_POS 5 |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REFDAC_CP ((uint16_t)(0x1UL << MXC_F_AFE_DAC_VREF_CTRL_REFDAC_CP_POS)) |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REFDAC_GAIN_POS 6 |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REFDAC_GAIN ((uint16_t)(0x3UL << MXC_F_AFE_DAC_VREF_CTRL_REFDAC_GAIN_POS)) |
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#define | MXC_V_AFE_DAC_VREF_CTRL_REFDAC_GAIN_DEFAULT_GAIN ((uint16_t)0x0UL) |
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#define | MXC_S_AFE_DAC_VREF_CTRL_REFDAC_GAIN_DEFAULT_GAIN (MXC_V_AFE_DAC_VREF_CTRL_REFDAC_GAIN_DEFAULT_GAIN << MXC_F_AFE_DAC_VREF_CTRL_REFDAC_GAIN_POS) |
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#define | MXC_V_AFE_DAC_VREF_CTRL_REFDAC_GAIN_HIGHEST_GAIN ((uint16_t)0x1UL) |
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#define | MXC_S_AFE_DAC_VREF_CTRL_REFDAC_GAIN_HIGHEST_GAIN (MXC_V_AFE_DAC_VREF_CTRL_REFDAC_GAIN_HIGHEST_GAIN << MXC_F_AFE_DAC_VREF_CTRL_REFDAC_GAIN_POS) |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REF_ABUS_POS 8 |
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#define | MXC_F_AFE_DAC_VREF_CTRL_REF_ABUS ((uint16_t)(0xFUL << MXC_F_AFE_DAC_VREF_CTRL_REF_ABUS_POS)) |
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#define | MXC_F_AFE_DAC_FIFO_FIFO_DATA_POS 0 |
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#define | MXC_F_AFE_DAC_FIFO_FIFO_DATA ((uint16_t)(0xFFFFUL << MXC_F_AFE_DAC_FIFO_FIFO_DATA_POS)) |
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#define | MXC_F_AFE_DAC_VREF_TRIM_V1_TRIM_POS 0 |
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#define | MXC_F_AFE_DAC_VREF_TRIM_V1_TRIM ((uint16_t)(0x1FUL << MXC_F_AFE_DAC_VREF_TRIM_V1_TRIM_POS)) |
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#define | MXC_F_AFE_DAC_VREF_TRIM_REF_BG_TRIM_POS 5 |
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#define | MXC_F_AFE_DAC_VREF_TRIM_REF_BG_TRIM ((uint16_t)(0x3FUL << MXC_F_AFE_DAC_VREF_TRIM_REF_BG_TRIM_POS)) |
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