MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
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Macros
afe_hart_regs.h File Reference
AFE_HART_Registers
#include <stdint.h>

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Macros

#define MXC_R_AFE_HART_CTRL   ((uint32_t)0x01800003UL)
 
#define MXC_R_AFE_HART_RX_TX_CTL   ((uint32_t)0x01810003UL)
 
#define MXC_R_AFE_HART_RX_CTL_EXT1   ((uint32_t)0x01820003UL)
 
#define MXC_R_AFE_HART_RX_CTL_EXT2   ((uint32_t)0x01830003UL)
 
#define MXC_R_AFE_HART_RX_DB_THRSHLD   ((uint32_t)0x01840003UL)
 
#define MXC_R_AFE_HART_RX_CRD_UP_THRSHLD   ((uint32_t)0x01850003UL)
 
#define MXC_R_AFE_HART_RX_CRD_DN_THRSHLD   ((uint32_t)0x01860003UL)
 
#define MXC_R_AFE_HART_RX_CRD_DOUT_THRSHLD   ((uint32_t)0x01870003UL)
 
#define MXC_R_AFE_HART_TX_MARKSPACE_CNT   ((uint32_t)0x01880003UL)
 
#define MXC_R_AFE_HART_STAT   ((uint32_t)0x01890003UL)
 
#define MXC_R_AFE_HART_TRIM   ((uint32_t)0x018A0003UL)
 
#define MXC_R_AFE_HART_TM   ((uint32_t)0x018B0003UL)
 
#define MXC_F_AFE_HART_CTRL_ADM_TM_EN_POS   0
 
#define MXC_F_AFE_HART_CTRL_ADM_TM_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_CTRL_ADM_TM_EN_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN_POS   0
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN_POS   1
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL_POS   2
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL   ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN_POS   3
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR_POS   4
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR   ((uint32_t)(0xFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT_POS   8
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT   ((uint32_t)(0xFFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT_POS   16
 
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT   ((uint32_t)(0xFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN_POS   20
 
#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN_POS   21
 
#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS_POS   22
 
#define MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS   ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS_POS))
 
#define MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN_POS   23
 
#define MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN_POS))
 
#define MXC_F_AFE_HART_RX_CTL_EXT1_RX_AN_INIT_VAL_POS   0
 
#define MXC_F_AFE_HART_RX_CTL_EXT1_RX_AN_INIT_VAL   ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CTL_EXT1_RX_AN_INIT_VAL_POS))
 
#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ARN_INIT_VAL_POS   0
 
#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ARN_INIT_VAL   ((uint32_t)(0x7FFFUL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_ARN_INIT_VAL_POS))
 
#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ZC_IGN_VAL_POS   16
 
#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ZC_IGN_VAL   ((uint32_t)(0x3UL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_ZC_IGN_VAL_POS))
 
#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_SYN_ALWS_EN_POS   20
 
#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_SYN_ALWS_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_SYN_ALWS_EN_POS))
 
#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_FAST_CNT_EN_POS   21
 
#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_FAST_CNT_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_FAST_CNT_EN_POS))
 
#define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_DN_THRSHLD_POS   0
 
#define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_DN_THRSHLD   ((uint32_t)(0x1FFUL << MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_DN_THRSHLD_POS))
 
#define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_UP_THRSHLD_POS   12
 
#define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_UP_THRSHLD   ((uint32_t)(0x1FFUL << MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_UP_THRSHLD_POS))
 
#define MXC_F_AFE_HART_RX_CRD_UP_THRSHLD_RX_CRD_UP_THRSHLD_POS   0
 
#define MXC_F_AFE_HART_RX_CRD_UP_THRSHLD_RX_CRD_UP_THRSHLD   ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CRD_UP_THRSHLD_RX_CRD_UP_THRSHLD_POS))
 
#define MXC_F_AFE_HART_RX_CRD_DN_THRSHLD_RX_CRD_DN_THRSHLD_POS   0
 
#define MXC_F_AFE_HART_RX_CRD_DN_THRSHLD_RX_CRD_DN_THRSHLD   ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CRD_DN_THRSHLD_RX_CRD_DN_THRSHLD_POS))
 
#define MXC_F_AFE_HART_RX_CRD_DOUT_THRSHLD_RX_CRD_DOUT_THRSHLD_POS   0
 
#define MXC_F_AFE_HART_RX_CRD_DOUT_THRSHLD_RX_CRD_DOUT_THRSHLD   ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CRD_DOUT_THRSHLD_RX_CRD_DOUT_THRSHLD_POS))
 
#define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_SPACE_CNT_POS   0
 
#define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_SPACE_CNT   ((uint32_t)(0x3FFUL << MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_SPACE_CNT_POS))
 
#define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_MARK_CNT_POS   12
 
#define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_MARK_CNT   ((uint32_t)(0x3FFUL << MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_MARK_CNT_POS))
 
#define MXC_F_AFE_HART_TRIM_TRIM_BIAS_POS   0
 
#define MXC_F_AFE_HART_TRIM_TRIM_BIAS   ((uint32_t)(0x1FUL << MXC_F_AFE_HART_TRIM_TRIM_BIAS_POS))
 
#define MXC_F_AFE_HART_TRIM_TRIM_BG_POS   8
 
#define MXC_F_AFE_HART_TRIM_TRIM_BG   ((uint32_t)(0x3FUL << MXC_F_AFE_HART_TRIM_TRIM_BG_POS))
 
#define MXC_F_AFE_HART_TRIM_TRIM_TX_SR_POS   16
 
#define MXC_F_AFE_HART_TRIM_TRIM_TX_SR   ((uint32_t)(0xFUL << MXC_F_AFE_HART_TRIM_TRIM_TX_SR_POS))
 
#define MXC_F_AFE_HART_TM_TM_EN_POS   0
 
#define MXC_F_AFE_HART_TM_TM_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_EN_POS))
 
#define MXC_F_AFE_HART_TM_TM_BIAS_EN_POS   1
 
#define MXC_F_AFE_HART_TM_TM_BIAS_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_BIAS_EN_POS))
 
#define MXC_F_AFE_HART_TM_TM_BG_EN_POS   3
 
#define MXC_F_AFE_HART_TM_TM_BG_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_BG_EN_POS))
 
#define MXC_F_AFE_HART_TM_TM_VREF_EN_POS   3
 
#define MXC_F_AFE_HART_TM_TM_VREF_EN   ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_VREF_EN_POS))
 

Detailed Description

Registers, Bit Masks and Bit Positions for the AFE_HART Peripheral Module.

Note
This file is @generated.