Macros
#define	MXC_R_DMA_CTRL ((uint32_t)0x00000000UL)

#define	MXC_R_DMA_STATUS ((uint32_t)0x00000004UL)

#define	MXC_R_DMA_SRC ((uint32_t)0x00000008UL)

#define	MXC_R_DMA_DST ((uint32_t)0x0000000CUL)

#define	MXC_R_DMA_CNT ((uint32_t)0x00000010UL)

#define	MXC_R_DMA_SRCRLD ((uint32_t)0x00000014UL)

#define	MXC_R_DMA_DSTRLD ((uint32_t)0x00000018UL)

#define	MXC_R_DMA_CNTRLD ((uint32_t)0x0000001CUL)

#define	MXC_R_DMA_INTEN ((uint32_t)0x00000000UL)

#define	MXC_R_DMA_INTFL ((uint32_t)0x00000004UL)

#define	MXC_R_DMA_CH ((uint32_t)0x00000100UL)

Detailed Description

DMA Peripheral Register Offsets from the DMA Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_DMA_CH

#define MXC_R_DMA_CH ((uint32_t)0x00000100UL)

Offset from DMA Base Address: 0x0100

◆ MXC_R_DMA_CNT

#define MXC_R_DMA_CNT ((uint32_t)0x00000010UL)

Offset from DMA Base Address: 0x0010

◆ MXC_R_DMA_CNTRLD

#define MXC_R_DMA_CNTRLD ((uint32_t)0x0000001CUL)

Offset from DMA Base Address: 0x001C

◆ MXC_R_DMA_CTRL

#define MXC_R_DMA_CTRL ((uint32_t)0x00000000UL)

Offset from DMA Base Address: 0x0000

◆ MXC_R_DMA_DST

#define MXC_R_DMA_DST ((uint32_t)0x0000000CUL)

Offset from DMA Base Address: 0x000C

◆ MXC_R_DMA_DSTRLD

#define MXC_R_DMA_DSTRLD ((uint32_t)0x00000018UL)

Offset from DMA Base Address: 0x0018

◆ MXC_R_DMA_INTEN

#define MXC_R_DMA_INTEN ((uint32_t)0x00000000UL)

Offset from DMA Base Address: 0x0000

◆ MXC_R_DMA_INTFL

#define MXC_R_DMA_INTFL ((uint32_t)0x00000004UL)

Offset from DMA Base Address: 0x0004

◆ MXC_R_DMA_SRC

#define MXC_R_DMA_SRC ((uint32_t)0x00000008UL)

Offset from DMA Base Address: 0x0008

◆ MXC_R_DMA_SRCRLD

#define MXC_R_DMA_SRCRLD ((uint32_t)0x00000014UL)

Offset from DMA Base Address: 0x0014

◆ MXC_R_DMA_STATUS

#define MXC_R_DMA_STATUS ((uint32_t)0x00000004UL)