i2c_regs.h File Reference

#include <stdint.h>

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Data Structures
struct	mxc_i2c_regs_t

Macros
#define	MXC_R_I2C_CTRL   ((uint32_t)0x00000000UL)
#define	MXC_R_I2C_STATUS   ((uint32_t)0x00000004UL)
#define	MXC_R_I2C_INTFL0   ((uint32_t)0x00000008UL)
#define	MXC_R_I2C_INTEN0   ((uint32_t)0x0000000CUL)
#define	MXC_R_I2C_INTFL1   ((uint32_t)0x00000010UL)
#define	MXC_R_I2C_INTEN1   ((uint32_t)0x00000014UL)
#define	MXC_R_I2C_FIFOLEN   ((uint32_t)0x00000018UL)
#define	MXC_R_I2C_RXCTRL0   ((uint32_t)0x0000001CUL)
#define	MXC_R_I2C_RXCTRL1   ((uint32_t)0x00000020UL)
#define	MXC_R_I2C_TXCTRL0   ((uint32_t)0x00000024UL)
#define	MXC_R_I2C_TXCTRL1   ((uint32_t)0x00000028UL)
#define	MXC_R_I2C_FIFO   ((uint32_t)0x0000002CUL)
#define	MXC_R_I2C_MSTCTRL   ((uint32_t)0x00000030UL)
#define	MXC_R_I2C_CLKLO   ((uint32_t)0x00000034UL)
#define	MXC_R_I2C_CLKHI   ((uint32_t)0x00000038UL)
#define	MXC_R_I2C_HSCLK   ((uint32_t)0x0000003CUL)
#define	MXC_R_I2C_TIMEOUT   ((uint32_t)0x00000040UL)
#define	MXC_R_I2C_SLAVE   ((uint32_t)0x00000044UL)
#define	MXC_R_I2C_DMA   ((uint32_t)0x00000048UL)
#define	MXC_F_I2C_CTRL_EN_POS   0
#define	MXC_F_I2C_CTRL_EN   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_EN_POS))
#define	MXC_F_I2C_CTRL_MST_MODE_POS   1
#define	MXC_F_I2C_CTRL_MST_MODE   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_MST_MODE_POS))
#define	MXC_F_I2C_CTRL_GC_ADDR_EN_POS   2
#define	MXC_F_I2C_CTRL_GC_ADDR_EN   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_GC_ADDR_EN_POS))
#define	MXC_F_I2C_CTRL_IRXM_EN_POS   3
#define	MXC_F_I2C_CTRL_IRXM_EN   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_IRXM_EN_POS))
#define	MXC_F_I2C_CTRL_IRXM_ACK_POS   4
#define	MXC_F_I2C_CTRL_IRXM_ACK   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_IRXM_ACK_POS))
#define	MXC_F_I2C_CTRL_SCL_OUT_POS   6
#define	MXC_F_I2C_CTRL_SCL_OUT   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SCL_OUT_POS))
#define	MXC_F_I2C_CTRL_SDA_OUT_POS   7
#define	MXC_F_I2C_CTRL_SDA_OUT   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SDA_OUT_POS))
#define	MXC_F_I2C_CTRL_SCL_POS   8
#define	MXC_F_I2C_CTRL_SCL   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SCL_POS))
#define	MXC_F_I2C_CTRL_SDA_POS   9
#define	MXC_F_I2C_CTRL_SDA   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_SDA_POS))
#define	MXC_F_I2C_CTRL_BB_MODE_POS   10
#define	MXC_F_I2C_CTRL_BB_MODE   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_BB_MODE_POS))
#define	MXC_F_I2C_CTRL_READ_POS   11
#define	MXC_F_I2C_CTRL_READ   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_READ_POS))
#define	MXC_F_I2C_CTRL_CLKSTR_DIS_POS   12
#define	MXC_F_I2C_CTRL_CLKSTR_DIS   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_CLKSTR_DIS_POS))
#define	MXC_F_I2C_CTRL_ONE_MST_MODE_POS   13
#define	MXC_F_I2C_CTRL_ONE_MST_MODE   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_ONE_MST_MODE_POS))
#define	MXC_F_I2C_CTRL_HS_EN_POS   15
#define	MXC_F_I2C_CTRL_HS_EN   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL_HS_EN_POS))
#define	MXC_F_I2C_STATUS_BUSY_POS   0
#define	MXC_F_I2C_STATUS_BUSY   ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_BUSY_POS))
#define	MXC_F_I2C_STATUS_RX_EM_POS   1
#define	MXC_F_I2C_STATUS_RX_EM   ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_RX_EM_POS))
#define	MXC_F_I2C_STATUS_RX_FULL_POS   2
#define	MXC_F_I2C_STATUS_RX_FULL   ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_RX_FULL_POS))
#define	MXC_F_I2C_STATUS_TX_EM_POS   3
#define	MXC_F_I2C_STATUS_TX_EM   ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_TX_EM_POS))
#define	MXC_F_I2C_STATUS_TX_FULL_POS   4
#define	MXC_F_I2C_STATUS_TX_FULL   ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_TX_FULL_POS))
#define	MXC_F_I2C_STATUS_MST_BUSY_POS   5
#define	MXC_F_I2C_STATUS_MST_BUSY   ((uint32_t)(0x1UL << MXC_F_I2C_STATUS_MST_BUSY_POS))
#define	MXC_F_I2C_INTFL0_DONE_POS   0
#define	MXC_F_I2C_INTFL0_DONE   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_DONE_POS))
#define	MXC_F_I2C_INTFL0_IRXM_POS   1
#define	MXC_F_I2C_INTFL0_IRXM   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_IRXM_POS))
#define	MXC_F_I2C_INTFL0_GC_ADDR_MATCH_POS   2
#define	MXC_F_I2C_INTFL0_GC_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_GC_ADDR_MATCH_POS))
#define	MXC_F_I2C_INTFL0_ADDR_MATCH_POS   3
#define	MXC_F_I2C_INTFL0_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_ADDR_MATCH_POS))
#define	MXC_F_I2C_INTFL0_RX_THD_POS   4
#define	MXC_F_I2C_INTFL0_RX_THD   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_RX_THD_POS))
#define	MXC_F_I2C_INTFL0_TX_THD_POS   5
#define	MXC_F_I2C_INTFL0_TX_THD   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_TX_THD_POS))
#define	MXC_F_I2C_INTFL0_STOP_POS   6
#define	MXC_F_I2C_INTFL0_STOP   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_STOP_POS))
#define	MXC_F_I2C_INTFL0_ADDR_ACK_POS   7
#define	MXC_F_I2C_INTFL0_ADDR_ACK   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_ADDR_ACK_POS))
#define	MXC_F_I2C_INTFL0_ARB_ERR_POS   8
#define	MXC_F_I2C_INTFL0_ARB_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_ARB_ERR_POS))
#define	MXC_F_I2C_INTFL0_TO_ERR_POS   9
#define	MXC_F_I2C_INTFL0_TO_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_TO_ERR_POS))
#define	MXC_F_I2C_INTFL0_ADDR_NACK_ERR_POS   10
#define	MXC_F_I2C_INTFL0_ADDR_NACK_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_ADDR_NACK_ERR_POS))
#define	MXC_F_I2C_INTFL0_DATA_ERR_POS   11
#define	MXC_F_I2C_INTFL0_DATA_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_DATA_ERR_POS))
#define	MXC_F_I2C_INTFL0_DNR_ERR_POS   12
#define	MXC_F_I2C_INTFL0_DNR_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_DNR_ERR_POS))
#define	MXC_F_I2C_INTFL0_START_ERR_POS   13
#define	MXC_F_I2C_INTFL0_START_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_START_ERR_POS))
#define	MXC_F_I2C_INTFL0_STOP_ERR_POS   14
#define	MXC_F_I2C_INTFL0_STOP_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_STOP_ERR_POS))
#define	MXC_F_I2C_INTFL0_TX_LOCKOUT_POS   15
#define	MXC_F_I2C_INTFL0_TX_LOCKOUT   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_TX_LOCKOUT_POS))
#define	MXC_F_I2C_INTFL0_MAMI_POS   16
#define	MXC_F_I2C_INTFL0_MAMI   ((uint32_t)(0x3FUL << MXC_F_I2C_INTFL0_MAMI_POS))
#define	MXC_F_I2C_INTFL0_RD_ADDR_MATCH_POS   22
#define	MXC_F_I2C_INTFL0_RD_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_RD_ADDR_MATCH_POS))
#define	MXC_F_I2C_INTFL0_WR_ADDR_MATCH_POS   23
#define	MXC_F_I2C_INTFL0_WR_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL0_WR_ADDR_MATCH_POS))
#define	MXC_F_I2C_INTEN0_DONE_POS   0
#define	MXC_F_I2C_INTEN0_DONE   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_DONE_POS))
#define	MXC_F_I2C_INTEN0_IRXM_POS   1
#define	MXC_F_I2C_INTEN0_IRXM   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_IRXM_POS))
#define	MXC_F_I2C_INTEN0_GC_ADDR_MATCH_POS   2
#define	MXC_F_I2C_INTEN0_GC_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_GC_ADDR_MATCH_POS))
#define	MXC_F_I2C_INTEN0_ADDR_MATCH_POS   3
#define	MXC_F_I2C_INTEN0_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_ADDR_MATCH_POS))
#define	MXC_F_I2C_INTEN0_RX_THD_POS   4
#define	MXC_F_I2C_INTEN0_RX_THD   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_RX_THD_POS))
#define	MXC_F_I2C_INTEN0_TX_THD_POS   5
#define	MXC_F_I2C_INTEN0_TX_THD   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_TX_THD_POS))
#define	MXC_F_I2C_INTEN0_STOP_POS   6
#define	MXC_F_I2C_INTEN0_STOP   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_STOP_POS))
#define	MXC_F_I2C_INTEN0_ADDR_ACK_POS   7
#define	MXC_F_I2C_INTEN0_ADDR_ACK   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_ADDR_ACK_POS))
#define	MXC_F_I2C_INTEN0_ARB_ERR_POS   8
#define	MXC_F_I2C_INTEN0_ARB_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_ARB_ERR_POS))
#define	MXC_F_I2C_INTEN0_TO_ERR_POS   9
#define	MXC_F_I2C_INTEN0_TO_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_TO_ERR_POS))
#define	MXC_F_I2C_INTEN0_ADDR_NACK_ERR_POS   10
#define	MXC_F_I2C_INTEN0_ADDR_NACK_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_ADDR_NACK_ERR_POS))
#define	MXC_F_I2C_INTEN0_DATA_ERR_POS   11
#define	MXC_F_I2C_INTEN0_DATA_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_DATA_ERR_POS))
#define	MXC_F_I2C_INTEN0_DNR_ERR_POS   12
#define	MXC_F_I2C_INTEN0_DNR_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_DNR_ERR_POS))
#define	MXC_F_I2C_INTEN0_START_ERR_POS   13
#define	MXC_F_I2C_INTEN0_START_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_START_ERR_POS))
#define	MXC_F_I2C_INTEN0_STOP_ERR_POS   14
#define	MXC_F_I2C_INTEN0_STOP_ERR   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_STOP_ERR_POS))
#define	MXC_F_I2C_INTEN0_TX_LOCKOUT_POS   15
#define	MXC_F_I2C_INTEN0_TX_LOCKOUT   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_TX_LOCKOUT_POS))
#define	MXC_F_I2C_INTEN0_MAMI_POS   16
#define	MXC_F_I2C_INTEN0_MAMI   ((uint32_t)(0x3FUL << MXC_F_I2C_INTEN0_MAMI_POS))
#define	MXC_F_I2C_INTEN0_RD_ADDR_MATCH_POS   22
#define	MXC_F_I2C_INTEN0_RD_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_RD_ADDR_MATCH_POS))
#define	MXC_F_I2C_INTEN0_WR_ADDR_MATCH_POS   23
#define	MXC_F_I2C_INTEN0_WR_ADDR_MATCH   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN0_WR_ADDR_MATCH_POS))
#define	MXC_F_I2C_INTFL1_RX_OV_POS   0
#define	MXC_F_I2C_INTFL1_RX_OV   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL1_RX_OV_POS))
#define	MXC_F_I2C_INTFL1_TX_UN_POS   1
#define	MXC_F_I2C_INTFL1_TX_UN   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL1_TX_UN_POS))
#define	MXC_F_I2C_INTFL1_START_POS   2
#define	MXC_F_I2C_INTFL1_START   ((uint32_t)(0x1UL << MXC_F_I2C_INTFL1_START_POS))
#define	MXC_F_I2C_INTEN1_RX_OV_POS   0
#define	MXC_F_I2C_INTEN1_RX_OV   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN1_RX_OV_POS))
#define	MXC_F_I2C_INTEN1_TX_UN_POS   1
#define	MXC_F_I2C_INTEN1_TX_UN   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN1_TX_UN_POS))
#define	MXC_F_I2C_INTEN1_START_POS   2
#define	MXC_F_I2C_INTEN1_START   ((uint32_t)(0x1UL << MXC_F_I2C_INTEN1_START_POS))
#define	MXC_F_I2C_FIFOLEN_RX_DEPTH_POS   0
#define	MXC_F_I2C_FIFOLEN_RX_DEPTH   ((uint32_t)(0xFFUL << MXC_F_I2C_FIFOLEN_RX_DEPTH_POS))
#define	MXC_F_I2C_FIFOLEN_TX_DEPTH_POS   8
#define	MXC_F_I2C_FIFOLEN_TX_DEPTH   ((uint32_t)(0xFFUL << MXC_F_I2C_FIFOLEN_TX_DEPTH_POS))
#define	MXC_F_I2C_RXCTRL0_DNR_POS   0
#define	MXC_F_I2C_RXCTRL0_DNR   ((uint32_t)(0x1UL << MXC_F_I2C_RXCTRL0_DNR_POS))
#define	MXC_F_I2C_RXCTRL0_FLUSH_POS   7
#define	MXC_F_I2C_RXCTRL0_FLUSH   ((uint32_t)(0x1UL << MXC_F_I2C_RXCTRL0_FLUSH_POS))
#define	MXC_F_I2C_RXCTRL0_THD_LVL_POS   8
#define	MXC_F_I2C_RXCTRL0_THD_LVL   ((uint32_t)(0xFUL << MXC_F_I2C_RXCTRL0_THD_LVL_POS))
#define	MXC_F_I2C_RXCTRL1_CNT_POS   0
#define	MXC_F_I2C_RXCTRL1_CNT   ((uint32_t)(0xFFUL << MXC_F_I2C_RXCTRL1_CNT_POS))
#define	MXC_F_I2C_RXCTRL1_LVL_POS   8
#define	MXC_F_I2C_RXCTRL1_LVL   ((uint32_t)(0xFUL << MXC_F_I2C_RXCTRL1_LVL_POS))
#define	MXC_F_I2C_TXCTRL0_PRELOAD_MODE_POS   0
#define	MXC_F_I2C_TXCTRL0_PRELOAD_MODE   ((uint32_t)(0x1UL << MXC_F_I2C_TXCTRL0_PRELOAD_MODE_POS))
#define	MXC_F_I2C_TXCTRL0_TX_READY_MODE_POS   1
#define	MXC_F_I2C_TXCTRL0_TX_READY_MODE   ((uint32_t)(0x1UL << MXC_F_I2C_TXCTRL0_TX_READY_MODE_POS))
#define	MXC_F_I2C_TXCTRL0_GC_ADDR_FLUSH_DIS_POS   2
#define	MXC_F_I2C_TXCTRL0_GC_ADDR_FLUSH_DIS   ((uint32_t)(0x1UL << MXC_F_I2C_TXCTRL0_GC_ADDR_FLUSH_DIS_POS))
#define	MXC_F_I2C_TXCTRL0_WR_ADDR_FLUSH_DIS_POS   3
#define	MXC_F_I2C_TXCTRL0_WR_ADDR_FLUSH_DIS   ((uint32_t)(0x1UL << MXC_F_I2C_TXCTRL0_WR_ADDR_FLUSH_DIS_POS))
#define	MXC_F_I2C_TXCTRL0_RD_ADDR_FLUSH_DIS_POS   4
#define	MXC_F_I2C_TXCTRL0_RD_ADDR_FLUSH_DIS   ((uint32_t)(0x1UL << MXC_F_I2C_TXCTRL0_RD_ADDR_FLUSH_DIS_POS))
#define	MXC_F_I2C_TXCTRL0_NACK_FLUSH_DIS_POS   5
#define	MXC_F_I2C_TXCTRL0_NACK_FLUSH_DIS   ((uint32_t)(0x1UL << MXC_F_I2C_TXCTRL0_NACK_FLUSH_DIS_POS))
#define	MXC_F_I2C_TXCTRL0_FLUSH_POS   7
#define	MXC_F_I2C_TXCTRL0_FLUSH   ((uint32_t)(0x1UL << MXC_F_I2C_TXCTRL0_FLUSH_POS))
#define	MXC_F_I2C_TXCTRL0_THD_VAL_POS   8
#define	MXC_F_I2C_TXCTRL0_THD_VAL   ((uint32_t)(0xFUL << MXC_F_I2C_TXCTRL0_THD_VAL_POS))
#define	MXC_F_I2C_TXCTRL1_PRELOAD_RDY_POS   0
#define	MXC_F_I2C_TXCTRL1_PRELOAD_RDY   ((uint32_t)(0x1UL << MXC_F_I2C_TXCTRL1_PRELOAD_RDY_POS))
#define	MXC_F_I2C_TXCTRL1_LVL_POS   8
#define	MXC_F_I2C_TXCTRL1_LVL   ((uint32_t)(0xFUL << MXC_F_I2C_TXCTRL1_LVL_POS))
#define	MXC_F_I2C_FIFO_DATA_POS   0
#define	MXC_F_I2C_FIFO_DATA   ((uint32_t)(0xFFUL << MXC_F_I2C_FIFO_DATA_POS))
#define	MXC_F_I2C_MSTCTRL_START_POS   0
#define	MXC_F_I2C_MSTCTRL_START   ((uint32_t)(0x1UL << MXC_F_I2C_MSTCTRL_START_POS))
#define	MXC_F_I2C_MSTCTRL_RESTART_POS   1
#define	MXC_F_I2C_MSTCTRL_RESTART   ((uint32_t)(0x1UL << MXC_F_I2C_MSTCTRL_RESTART_POS))
#define	MXC_F_I2C_MSTCTRL_STOP_POS   2
#define	MXC_F_I2C_MSTCTRL_STOP   ((uint32_t)(0x1UL << MXC_F_I2C_MSTCTRL_STOP_POS))
#define	MXC_F_I2C_MSTCTRL_EX_ADDR_EN_POS   7
#define	MXC_F_I2C_MSTCTRL_EX_ADDR_EN   ((uint32_t)(0x1UL << MXC_F_I2C_MSTCTRL_EX_ADDR_EN_POS))
#define	MXC_F_I2C_CLKLO_LO_POS   0
#define	MXC_F_I2C_CLKLO_LO   ((uint32_t)(0x1FFUL << MXC_F_I2C_CLKLO_LO_POS))
#define	MXC_F_I2C_CLKHI_HI_POS   0
#define	MXC_F_I2C_CLKHI_HI   ((uint32_t)(0x1FFUL << MXC_F_I2C_CLKHI_HI_POS))
#define	MXC_F_I2C_HSCLK_LO_POS   0
#define	MXC_F_I2C_HSCLK_LO   ((uint32_t)(0xFFUL << MXC_F_I2C_HSCLK_LO_POS))
#define	MXC_F_I2C_HSCLK_HI_POS   8
#define	MXC_F_I2C_HSCLK_HI   ((uint32_t)(0xFFUL << MXC_F_I2C_HSCLK_HI_POS))
#define	MXC_F_I2C_TIMEOUT_SCL_TO_VAL_POS   0
#define	MXC_F_I2C_TIMEOUT_SCL_TO_VAL   ((uint32_t)(0xFFFFUL << MXC_F_I2C_TIMEOUT_SCL_TO_VAL_POS))
#define	MXC_F_I2C_SLAVE_ADDR_POS   0
#define	MXC_F_I2C_SLAVE_ADDR   ((uint32_t)(0x3FFUL << MXC_F_I2C_SLAVE_ADDR_POS))
#define	MXC_F_I2C_SLAVE_DIS_POS   10
#define	MXC_F_I2C_SLAVE_DIS   ((uint32_t)(0x1UL << MXC_F_I2C_SLAVE_DIS_POS))
#define	MXC_F_I2C_SLAVE_IDX_POS   11
#define	MXC_F_I2C_SLAVE_IDX   ((uint32_t)(0xFUL << MXC_F_I2C_SLAVE_IDX_POS))
#define	MXC_F_I2C_SLAVE_EXT_ADDR_EN_POS   15
#define	MXC_F_I2C_SLAVE_EXT_ADDR_EN   ((uint32_t)(0x1UL << MXC_F_I2C_SLAVE_EXT_ADDR_EN_POS))
#define	MXC_F_I2C_DMA_TX_EN_POS   0
#define	MXC_F_I2C_DMA_TX_EN   ((uint32_t)(0x1UL << MXC_F_I2C_DMA_TX_EN_POS))
#define	MXC_F_I2C_DMA_RX_EN_POS   1
#define	MXC_F_I2C_DMA_RX_EN   ((uint32_t)(0x1UL << MXC_F_I2C_DMA_RX_EN_POS))

Detailed Description

Registers, Bit Masks and Bit Positions for the I2C Peripheral Module.

Note

This file is @generated.