MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
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i2s.h
1
6/******************************************************************************
7 *
8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
9 * Analog Devices, Inc.),
10 * Copyright (C) 2023-2024 Analog Devices, Inc.
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *
24 ******************************************************************************/
25
26#ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_I2S_H_
27#define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_I2S_H_
28
29/* **** Includes **** */
30#include "mxc_sys.h"
31#include "dma.h"
32#include "i2s_regs.h"
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
44/* **** Definitions **** */
45
47typedef enum {
48 MXC_I2S_STEREO = 0,
49 MXC_I2S_MONO_LEFT_CH = 2,
50 MXC_I2S_MONO_RIGHT_CH = 3
52
54typedef enum { MXC_I2S_POL_NORMAL, MXC_I2S_POL_INVERSE } mxc_i2s_polarity_t;
55
57typedef enum { MXC_I2S_MSB_FIRST, MXC_I2S_LSB_FIRST } mxc_i2s_bitorder_t;
58
60typedef enum { MXC_I2S_MSB_JUSTIFY, MXC_I2S_LSB_JUSTIFY } mxc_i2s_justify_t;
61
65typedef enum {
69
75
79typedef enum {
80 MXC_I2S_ADJUST_LEFT,
81 MXC_I2S_ADJUST_RIGHT,
83
85typedef enum {
86 MXC_I2S_INTERNAL_SCK_WS_0,
87 MXC_I2S_INTERNAL_SCK_WS_1,
88 MXC_I2S_EXTERNAL_SCK_INTERNAL_WS,
89 MXC_I2S_EXTERNAL_SCK_EXTERNAL_WS,
91
92#define MXC_I2S_SAMPLESIZE_EIGHT (8)
93#define MXC_I2S_SAMPLESIZE_SIXTEEN (16)
94#define MXC_I2S_SAMPLESIZE_TWENTY (20)
95#define MXC_I2S_SAMPLESIZE_TWENTYFOUR (24)
96#define MXC_I2S_SAMPLESIZE_THIRTYTWO (32)
97
98typedef uint8_t mxc_i2s_samplesize_t;
99
115typedef struct {
116 mxc_i2s_ch_mode_t channelMode;
117 mxc_i2s_stereo_t stereoMode;
118 mxc_i2s_wsize_t wordSize;
119 mxc_i2s_justify_t justify;
120 mxc_i2s_bitorder_t bitOrder;
121 mxc_i2s_polarity_t wsPolarity;
122 mxc_i2s_samplesize_t
124 uint16_t clkdiv;
125 mxc_i2s_adjust_t adjust;
126 uint8_t bitsWord;
127 void *rawData;
128 void *txData;
129 void *rxData;
130 uint32_t length;
132
133/* **** Function Prototypes **** */
134
142
149
157
162
167
172
177
184int MXC_I2S_SetRXThreshold(uint8_t threshold);
185
193int MXC_I2S_SetFrequency(mxc_i2s_ch_mode_t mode, uint16_t clkdiv);
194
203int MXC_I2S_SetSampleRate(uint32_t smpl_rate, mxc_i2s_wsize_t smpl_sz);
204
211
220int MXC_I2S_CalculateClockDiv(uint32_t smpl_rate, mxc_i2s_wsize_t smpl_sz);
221
226void MXC_I2S_Flush(void);
227
238int MXC_I2S_FillTXFIFO(void *txData, mxc_i2s_wsize_t wordSize, int len, int smpl_cnt);
239
250int MXC_I2S_ReadRXFIFO(void *rxData, mxc_i2s_wsize_t wordSize, int len, int smpl_cnt);
251
257void MXC_I2S_EnableInt(uint32_t flags);
258
264void MXC_I2S_DisableInt(uint32_t flags);
265
272
278void MXC_I2S_ClearFlags(uint32_t flags);
279
288
297
306int MXC_I2S_TXDMAConfig(void *src_addr, int len);
307
316int MXC_I2S_RXDMAConfig(void *dest_addr, int len);
317
322
328void MXC_I2S_RegisterDMACallback(void (*callback)(int, int));
329
335void MXC_I2S_RegisterAsyncCallback(void (*callback)(int));
336
337#ifdef __cplusplus
338}
339#endif
340
341#endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_I2S_H_
int MXC_I2S_SetSampleRate(uint32_t smpl_rate, mxc_i2s_wsize_t smpl_sz)
Sets the clock divider to provide the desired sampling rate.
void MXC_I2S_EnableInt(uint32_t flags)
Enable Interrupts.
int MXC_I2S_ReadRXFIFO(void *rxData, mxc_i2s_wsize_t wordSize, int len, int smpl_cnt)
Read audio samples from I2S receive buffer.
mxc_i2s_ch_mode_t
I2S channel mode.
Definition: i2s.h:85
uint8_t bitsWord
MAX=0x1F.
Definition: i2s.h:126
int MXC_I2S_GetFlags(void)
Get the set interrupt flags.
int MXC_I2S_Transaction(mxc_i2s_req_t *i2s_req)
Performs a blocking I2S transaction.
mxc_i2s_justify_t
I2S transaction justify order.
Definition: i2s.h:60
int MXC_I2S_ConfigData(mxc_i2s_req_t *req)
Configure data to be transmitted based on word and sample size.
int MXC_I2S_FillTXFIFO(void *txData, mxc_i2s_wsize_t wordSize, int len, int smpl_cnt)
Fill I2S FIFO with data to transmit.
void MXC_I2S_TXDisable(void)
Disable TX channel.
mxc_i2s_wsize_t
I2S transaction word size.
Definition: i2s.h:65
mxc_i2s_adjust_t
I2S transaction adjust position.
Definition: i2s.h:79
int MXC_I2S_RXDMAConfig(void *dest_addr, int len)
Configure RX DMA transaction.
void MXC_I2S_RXEnable(void)
Enable RX channel.
mxc_i2s_polarity_t
I2S polarity configuration.
Definition: i2s.h:54
int MXC_I2S_Init(mxc_i2s_req_t *req)
Initialize I2S resources.
void MXC_I2S_DisableInt(uint32_t flags)
Disable Interrupt.
void MXC_I2S_TXEnable(void)
Enable TX channel.
int MXC_I2S_TXDMAConfig(void *src_addr, int len)
Configure TX DMA transaction.
mxc_i2s_bitorder_t
I2S transaction bit order.
Definition: i2s.h:57
int MXC_I2S_SetFrequency(mxc_i2s_ch_mode_t mode, uint16_t clkdiv)
Set I2S Frequency, automatically called by I2S_Init.
void MXC_I2S_Flush(void)
Flush I2S FIFO.
void MXC_I2S_RegisterAsyncCallback(void(*callback)(int))
Sets the callback function for asynchronous I2S transactions.
void MXC_I2S_RegisterDMACallback(void(*callback)(int, int))
Set the callback function pointer for I2S DMA transactions.
void MXC_I2S_ClearFlags(uint32_t flags)
Clears Interrupt Flags.
void MXC_I2S_Handler(void)
Handler for asynchronous I2S transactions.
mxc_i2s_samplesize_t sampleSize
Optional - Between zero and bitsWord. Consider setting 'adjust' field with this.
Definition: i2s.h:123
int MXC_I2S_GetSampleRate(void)
Returns the current sampling rate.
int MXC_I2S_CalculateClockDiv(uint32_t smpl_rate, mxc_i2s_wsize_t smpl_sz)
Calculates the value of the clock divider that should be used in order to get the desired sampling fr...
mxc_i2s_stereo_t
I2S stereo mode select.
Definition: i2s.h:47
int MXC_I2S_SetRXThreshold(uint8_t threshold)
Set threshold for RX FIFO
void MXC_I2S_RXDisable(void)
Disable RX channel.
int MXC_I2S_TransactionAsync(mxc_i2s_req_t *i2s_req)
Sets up an asynchronous I2S transaction.
int MXC_I2S_Shutdown(void)
Release I2S, clear configuration and flush FIFOs.
@ MXC_I2S_WSIZE_WORD
Set 32-bit FIFO transactions.
Definition: i2s.h:68
@ MXC_I2S_DATASIZE_WORD
Legacy name. Use MXC_I2S_WSIZE_WORD instead.
Definition: i2s.h:73
@ MXC_I2S_DATASIZE_BYTE
Legacy name. Use MXC_I2S_WSIZE_BYTE instead.
Definition: i2s.h:70
@ MXC_I2S_WSIZE_BYTE
Set 8-bit FIFO transactions.
Definition: i2s.h:66
@ MXC_I2S_DATASIZE_HALFWORD
Legacy name. Use MXC_I2S_WSIZE_HALFWORD instead.
Definition: i2s.h:71
@ MXC_I2S_WSIZE_HALFWORD
Set 16-bit FIFO transactions.
Definition: i2s.h:67
I2S Configuration Struct.
Definition: i2s.h:115
Registers, Bit Masks and Bit Positions for the I2S Peripheral Module.