MAX32680 Peripheral Driver API
Peripheral Driver API for the MAX32680
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DMA_CTRL
Direct Memory Access (DMA) » DMA_Registers

Macros

#define MXC_F_DMA_CTRL_EN_POS   0
 
#define MXC_F_DMA_CTRL_EN   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_EN_POS))
 
#define MXC_F_DMA_CTRL_RLDEN_POS   1
 
#define MXC_F_DMA_CTRL_RLDEN   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_RLDEN_POS))
 
#define MXC_F_DMA_CTRL_PRI_POS   2
 
#define MXC_F_DMA_CTRL_PRI   ((uint32_t)(0x3UL << MXC_F_DMA_CTRL_PRI_POS))
 
#define MXC_V_DMA_CTRL_PRI_HIGH   ((uint32_t)0x0UL)
 
#define MXC_S_DMA_CTRL_PRI_HIGH   (MXC_V_DMA_CTRL_PRI_HIGH << MXC_F_DMA_CTRL_PRI_POS)
 
#define MXC_V_DMA_CTRL_PRI_MEDHIGH   ((uint32_t)0x1UL)
 
#define MXC_S_DMA_CTRL_PRI_MEDHIGH   (MXC_V_DMA_CTRL_PRI_MEDHIGH << MXC_F_DMA_CTRL_PRI_POS)
 
#define MXC_V_DMA_CTRL_PRI_MEDLOW   ((uint32_t)0x2UL)
 
#define MXC_S_DMA_CTRL_PRI_MEDLOW   (MXC_V_DMA_CTRL_PRI_MEDLOW << MXC_F_DMA_CTRL_PRI_POS)
 
#define MXC_V_DMA_CTRL_PRI_LOW   ((uint32_t)0x3UL)
 
#define MXC_S_DMA_CTRL_PRI_LOW   (MXC_V_DMA_CTRL_PRI_LOW << MXC_F_DMA_CTRL_PRI_POS)
 
#define MXC_F_DMA_CTRL_REQUEST_POS   4
 
#define MXC_F_DMA_CTRL_REQUEST   ((uint32_t)(0x3FUL << MXC_F_DMA_CTRL_REQUEST_POS))
 
#define MXC_V_DMA_CTRL_REQUEST_MEMTOMEM   ((uint32_t)0x0UL)
 
#define MXC_S_DMA_CTRL_REQUEST_MEMTOMEM   (MXC_V_DMA_CTRL_REQUEST_MEMTOMEM << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_SPI1RX   ((uint32_t)0x1UL)
 
#define MXC_S_DMA_CTRL_REQUEST_SPI1RX   (MXC_V_DMA_CTRL_REQUEST_SPI1RX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_UART0RX   ((uint32_t)0x4UL)
 
#define MXC_S_DMA_CTRL_REQUEST_UART0RX   (MXC_V_DMA_CTRL_REQUEST_UART0RX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_UART1RX   ((uint32_t)0x5UL)
 
#define MXC_S_DMA_CTRL_REQUEST_UART1RX   (MXC_V_DMA_CTRL_REQUEST_UART1RX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_I2C0RX   ((uint32_t)0x7UL)
 
#define MXC_S_DMA_CTRL_REQUEST_I2C0RX   (MXC_V_DMA_CTRL_REQUEST_I2C0RX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_I2C1RX   ((uint32_t)0x8UL)
 
#define MXC_S_DMA_CTRL_REQUEST_I2C1RX   (MXC_V_DMA_CTRL_REQUEST_I2C1RX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_ADC   ((uint32_t)0x9UL)
 
#define MXC_S_DMA_CTRL_REQUEST_ADC   (MXC_V_DMA_CTRL_REQUEST_ADC << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_I2C2RX   ((uint32_t)0xAUL)
 
#define MXC_S_DMA_CTRL_REQUEST_I2C2RX   (MXC_V_DMA_CTRL_REQUEST_I2C2RX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_UART2RX   ((uint32_t)0xEUL)
 
#define MXC_S_DMA_CTRL_REQUEST_UART2RX   (MXC_V_DMA_CTRL_REQUEST_UART2RX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_SPI0RX   ((uint32_t)0xFUL)
 
#define MXC_S_DMA_CTRL_REQUEST_SPI0RX   (MXC_V_DMA_CTRL_REQUEST_SPI0RX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_AESRX   ((uint32_t)0x10UL)
 
#define MXC_S_DMA_CTRL_REQUEST_AESRX   (MXC_V_DMA_CTRL_REQUEST_AESRX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_UART3RX   ((uint32_t)0x1CUL)
 
#define MXC_S_DMA_CTRL_REQUEST_UART3RX   (MXC_V_DMA_CTRL_REQUEST_UART3RX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_I2SRX   ((uint32_t)0x1EUL)
 
#define MXC_S_DMA_CTRL_REQUEST_I2SRX   (MXC_V_DMA_CTRL_REQUEST_I2SRX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_SPI1TX   ((uint32_t)0x21UL)
 
#define MXC_S_DMA_CTRL_REQUEST_SPI1TX   (MXC_V_DMA_CTRL_REQUEST_SPI1TX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_UART0TX   ((uint32_t)0x24UL)
 
#define MXC_S_DMA_CTRL_REQUEST_UART0TX   (MXC_V_DMA_CTRL_REQUEST_UART0TX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_UART1TX   ((uint32_t)0x25UL)
 
#define MXC_S_DMA_CTRL_REQUEST_UART1TX   (MXC_V_DMA_CTRL_REQUEST_UART1TX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_I2C0TX   ((uint32_t)0x27UL)
 
#define MXC_S_DMA_CTRL_REQUEST_I2C0TX   (MXC_V_DMA_CTRL_REQUEST_I2C0TX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_I2C1TX   ((uint32_t)0x28UL)
 
#define MXC_S_DMA_CTRL_REQUEST_I2C1TX   (MXC_V_DMA_CTRL_REQUEST_I2C1TX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_I2C2TX   ((uint32_t)0x2AUL)
 
#define MXC_S_DMA_CTRL_REQUEST_I2C2TX   (MXC_V_DMA_CTRL_REQUEST_I2C2TX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_CRCTX   ((uint32_t)0x2CUL)
 
#define MXC_S_DMA_CTRL_REQUEST_CRCTX   (MXC_V_DMA_CTRL_REQUEST_CRCTX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_UART2TX   ((uint32_t)0x2EUL)
 
#define MXC_S_DMA_CTRL_REQUEST_UART2TX   (MXC_V_DMA_CTRL_REQUEST_UART2TX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_SPI0TX   ((uint32_t)0x2FUL)
 
#define MXC_S_DMA_CTRL_REQUEST_SPI0TX   (MXC_V_DMA_CTRL_REQUEST_SPI0TX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_AESTX   ((uint32_t)0x30UL)
 
#define MXC_S_DMA_CTRL_REQUEST_AESTX   (MXC_V_DMA_CTRL_REQUEST_AESTX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_UART3TX   ((uint32_t)0x3CUL)
 
#define MXC_S_DMA_CTRL_REQUEST_UART3TX   (MXC_V_DMA_CTRL_REQUEST_UART3TX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_V_DMA_CTRL_REQUEST_I2STX   ((uint32_t)0x3EUL)
 
#define MXC_S_DMA_CTRL_REQUEST_I2STX   (MXC_V_DMA_CTRL_REQUEST_I2STX << MXC_F_DMA_CTRL_REQUEST_POS)
 
#define MXC_F_DMA_CTRL_TO_WAIT_POS   10
 
#define MXC_F_DMA_CTRL_TO_WAIT   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_TO_WAIT_POS))
 
#define MXC_F_DMA_CTRL_TO_PER_POS   11
 
#define MXC_F_DMA_CTRL_TO_PER   ((uint32_t)(0x7UL << MXC_F_DMA_CTRL_TO_PER_POS))
 
#define MXC_V_DMA_CTRL_TO_PER_TO4   ((uint32_t)0x0UL)
 
#define MXC_S_DMA_CTRL_TO_PER_TO4   (MXC_V_DMA_CTRL_TO_PER_TO4 << MXC_F_DMA_CTRL_TO_PER_POS)
 
#define MXC_V_DMA_CTRL_TO_PER_TO8   ((uint32_t)0x1UL)
 
#define MXC_S_DMA_CTRL_TO_PER_TO8   (MXC_V_DMA_CTRL_TO_PER_TO8 << MXC_F_DMA_CTRL_TO_PER_POS)
 
#define MXC_V_DMA_CTRL_TO_PER_TO16   ((uint32_t)0x2UL)
 
#define MXC_S_DMA_CTRL_TO_PER_TO16   (MXC_V_DMA_CTRL_TO_PER_TO16 << MXC_F_DMA_CTRL_TO_PER_POS)
 
#define MXC_V_DMA_CTRL_TO_PER_TO32   ((uint32_t)0x3UL)
 
#define MXC_S_DMA_CTRL_TO_PER_TO32   (MXC_V_DMA_CTRL_TO_PER_TO32 << MXC_F_DMA_CTRL_TO_PER_POS)
 
#define MXC_V_DMA_CTRL_TO_PER_TO64   ((uint32_t)0x4UL)
 
#define MXC_S_DMA_CTRL_TO_PER_TO64   (MXC_V_DMA_CTRL_TO_PER_TO64 << MXC_F_DMA_CTRL_TO_PER_POS)
 
#define MXC_V_DMA_CTRL_TO_PER_TO128   ((uint32_t)0x5UL)
 
#define MXC_S_DMA_CTRL_TO_PER_TO128   (MXC_V_DMA_CTRL_TO_PER_TO128 << MXC_F_DMA_CTRL_TO_PER_POS)
 
#define MXC_V_DMA_CTRL_TO_PER_TO256   ((uint32_t)0x6UL)
 
#define MXC_S_DMA_CTRL_TO_PER_TO256   (MXC_V_DMA_CTRL_TO_PER_TO256 << MXC_F_DMA_CTRL_TO_PER_POS)
 
#define MXC_V_DMA_CTRL_TO_PER_TO512   ((uint32_t)0x7UL)
 
#define MXC_S_DMA_CTRL_TO_PER_TO512   (MXC_V_DMA_CTRL_TO_PER_TO512 << MXC_F_DMA_CTRL_TO_PER_POS)
 
#define MXC_F_DMA_CTRL_TO_CLKDIV_POS   14
 
#define MXC_F_DMA_CTRL_TO_CLKDIV   ((uint32_t)(0x3UL << MXC_F_DMA_CTRL_TO_CLKDIV_POS))
 
#define MXC_V_DMA_CTRL_TO_CLKDIV_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIS   (MXC_V_DMA_CTRL_TO_CLKDIV_DIS << MXC_F_DMA_CTRL_TO_CLKDIV_POS)
 
#define MXC_V_DMA_CTRL_TO_CLKDIV_DIV256   ((uint32_t)0x1UL)
 
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV256   (MXC_V_DMA_CTRL_TO_CLKDIV_DIV256 << MXC_F_DMA_CTRL_TO_CLKDIV_POS)
 
#define MXC_V_DMA_CTRL_TO_CLKDIV_DIV64K   ((uint32_t)0x2UL)
 
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV64K   (MXC_V_DMA_CTRL_TO_CLKDIV_DIV64K << MXC_F_DMA_CTRL_TO_CLKDIV_POS)
 
#define MXC_V_DMA_CTRL_TO_CLKDIV_DIV16M   ((uint32_t)0x3UL)
 
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV16M   (MXC_V_DMA_CTRL_TO_CLKDIV_DIV16M << MXC_F_DMA_CTRL_TO_CLKDIV_POS)
 
#define MXC_F_DMA_CTRL_SRCWD_POS   16
 
#define MXC_F_DMA_CTRL_SRCWD   ((uint32_t)(0x3UL << MXC_F_DMA_CTRL_SRCWD_POS))
 
#define MXC_V_DMA_CTRL_SRCWD_BYTE   ((uint32_t)0x0UL)
 
#define MXC_S_DMA_CTRL_SRCWD_BYTE   (MXC_V_DMA_CTRL_SRCWD_BYTE << MXC_F_DMA_CTRL_SRCWD_POS)
 
#define MXC_V_DMA_CTRL_SRCWD_HALFWORD   ((uint32_t)0x1UL)
 
#define MXC_S_DMA_CTRL_SRCWD_HALFWORD   (MXC_V_DMA_CTRL_SRCWD_HALFWORD << MXC_F_DMA_CTRL_SRCWD_POS)
 
#define MXC_V_DMA_CTRL_SRCWD_WORD   ((uint32_t)0x2UL)
 
#define MXC_S_DMA_CTRL_SRCWD_WORD   (MXC_V_DMA_CTRL_SRCWD_WORD << MXC_F_DMA_CTRL_SRCWD_POS)
 
#define MXC_F_DMA_CTRL_SRCINC_POS   18
 
#define MXC_F_DMA_CTRL_SRCINC   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_SRCINC_POS))
 
#define MXC_F_DMA_CTRL_DSTWD_POS   20
 
#define MXC_F_DMA_CTRL_DSTWD   ((uint32_t)(0x3UL << MXC_F_DMA_CTRL_DSTWD_POS))
 
#define MXC_V_DMA_CTRL_DSTWD_BYTE   ((uint32_t)0x0UL)
 
#define MXC_S_DMA_CTRL_DSTWD_BYTE   (MXC_V_DMA_CTRL_DSTWD_BYTE << MXC_F_DMA_CTRL_DSTWD_POS)
 
#define MXC_V_DMA_CTRL_DSTWD_HALFWORD   ((uint32_t)0x1UL)
 
#define MXC_S_DMA_CTRL_DSTWD_HALFWORD   (MXC_V_DMA_CTRL_DSTWD_HALFWORD << MXC_F_DMA_CTRL_DSTWD_POS)
 
#define MXC_V_DMA_CTRL_DSTWD_WORD   ((uint32_t)0x2UL)
 
#define MXC_S_DMA_CTRL_DSTWD_WORD   (MXC_V_DMA_CTRL_DSTWD_WORD << MXC_F_DMA_CTRL_DSTWD_POS)
 
#define MXC_F_DMA_CTRL_DSTINC_POS   22
 
#define MXC_F_DMA_CTRL_DSTINC   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_DSTINC_POS))
 
#define MXC_F_DMA_CTRL_BURST_SIZE_POS   24
 
#define MXC_F_DMA_CTRL_BURST_SIZE   ((uint32_t)(0x1FUL << MXC_F_DMA_CTRL_BURST_SIZE_POS))
 
#define MXC_F_DMA_CTRL_DIS_IE_POS   30
 
#define MXC_F_DMA_CTRL_DIS_IE   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_DIS_IE_POS))
 
#define MXC_F_DMA_CTRL_CTZ_IE_POS   31
 
#define MXC_F_DMA_CTRL_CTZ_IE   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_CTZ_IE_POS))
 

Detailed Description

DMA Channel Control Register.

Macro Definition Documentation

◆ MXC_F_DMA_CTRL_BURST_SIZE

#define MXC_F_DMA_CTRL_BURST_SIZE   ((uint32_t)(0x1FUL << MXC_F_DMA_CTRL_BURST_SIZE_POS))

CTRL_BURST_SIZE Mask

◆ MXC_F_DMA_CTRL_BURST_SIZE_POS

#define MXC_F_DMA_CTRL_BURST_SIZE_POS   24

CTRL_BURST_SIZE Position

◆ MXC_F_DMA_CTRL_CTZ_IE

#define MXC_F_DMA_CTRL_CTZ_IE   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_CTZ_IE_POS))

CTRL_CTZ_IE Mask

◆ MXC_F_DMA_CTRL_CTZ_IE_POS

#define MXC_F_DMA_CTRL_CTZ_IE_POS   31

CTRL_CTZ_IE Position

◆ MXC_F_DMA_CTRL_DIS_IE

#define MXC_F_DMA_CTRL_DIS_IE   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_DIS_IE_POS))

CTRL_DIS_IE Mask

◆ MXC_F_DMA_CTRL_DIS_IE_POS

#define MXC_F_DMA_CTRL_DIS_IE_POS   30

CTRL_DIS_IE Position

◆ MXC_F_DMA_CTRL_DSTINC

#define MXC_F_DMA_CTRL_DSTINC   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_DSTINC_POS))

CTRL_DSTINC Mask

◆ MXC_F_DMA_CTRL_DSTINC_POS

#define MXC_F_DMA_CTRL_DSTINC_POS   22

CTRL_DSTINC Position

◆ MXC_F_DMA_CTRL_DSTWD

#define MXC_F_DMA_CTRL_DSTWD   ((uint32_t)(0x3UL << MXC_F_DMA_CTRL_DSTWD_POS))

CTRL_DSTWD Mask

◆ MXC_F_DMA_CTRL_DSTWD_POS

#define MXC_F_DMA_CTRL_DSTWD_POS   20

CTRL_DSTWD Position

◆ MXC_F_DMA_CTRL_EN

#define MXC_F_DMA_CTRL_EN   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_EN_POS))

CTRL_EN Mask

◆ MXC_F_DMA_CTRL_EN_POS

#define MXC_F_DMA_CTRL_EN_POS   0

CTRL_EN Position

◆ MXC_F_DMA_CTRL_PRI

#define MXC_F_DMA_CTRL_PRI   ((uint32_t)(0x3UL << MXC_F_DMA_CTRL_PRI_POS))

CTRL_PRI Mask

◆ MXC_F_DMA_CTRL_PRI_POS

#define MXC_F_DMA_CTRL_PRI_POS   2

CTRL_PRI Position

◆ MXC_F_DMA_CTRL_REQUEST

#define MXC_F_DMA_CTRL_REQUEST   ((uint32_t)(0x3FUL << MXC_F_DMA_CTRL_REQUEST_POS))

CTRL_REQUEST Mask

◆ MXC_F_DMA_CTRL_REQUEST_POS

#define MXC_F_DMA_CTRL_REQUEST_POS   4

CTRL_REQUEST Position

◆ MXC_F_DMA_CTRL_RLDEN

#define MXC_F_DMA_CTRL_RLDEN   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_RLDEN_POS))

CTRL_RLDEN Mask

◆ MXC_F_DMA_CTRL_RLDEN_POS

#define MXC_F_DMA_CTRL_RLDEN_POS   1

CTRL_RLDEN Position

◆ MXC_F_DMA_CTRL_SRCINC

#define MXC_F_DMA_CTRL_SRCINC   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_SRCINC_POS))

CTRL_SRCINC Mask

◆ MXC_F_DMA_CTRL_SRCINC_POS

#define MXC_F_DMA_CTRL_SRCINC_POS   18

CTRL_SRCINC Position

◆ MXC_F_DMA_CTRL_SRCWD

#define MXC_F_DMA_CTRL_SRCWD   ((uint32_t)(0x3UL << MXC_F_DMA_CTRL_SRCWD_POS))

CTRL_SRCWD Mask

◆ MXC_F_DMA_CTRL_SRCWD_POS

#define MXC_F_DMA_CTRL_SRCWD_POS   16

CTRL_SRCWD Position

◆ MXC_F_DMA_CTRL_TO_CLKDIV

#define MXC_F_DMA_CTRL_TO_CLKDIV   ((uint32_t)(0x3UL << MXC_F_DMA_CTRL_TO_CLKDIV_POS))

CTRL_TO_CLKDIV Mask

◆ MXC_F_DMA_CTRL_TO_CLKDIV_POS

#define MXC_F_DMA_CTRL_TO_CLKDIV_POS   14

CTRL_TO_CLKDIV Position

◆ MXC_F_DMA_CTRL_TO_PER

#define MXC_F_DMA_CTRL_TO_PER   ((uint32_t)(0x7UL << MXC_F_DMA_CTRL_TO_PER_POS))

CTRL_TO_PER Mask

◆ MXC_F_DMA_CTRL_TO_PER_POS

#define MXC_F_DMA_CTRL_TO_PER_POS   11

CTRL_TO_PER Position

◆ MXC_F_DMA_CTRL_TO_WAIT

#define MXC_F_DMA_CTRL_TO_WAIT   ((uint32_t)(0x1UL << MXC_F_DMA_CTRL_TO_WAIT_POS))

CTRL_TO_WAIT Mask

◆ MXC_F_DMA_CTRL_TO_WAIT_POS

#define MXC_F_DMA_CTRL_TO_WAIT_POS   10

CTRL_TO_WAIT Position

◆ MXC_S_DMA_CTRL_DSTWD_BYTE

#define MXC_S_DMA_CTRL_DSTWD_BYTE   (MXC_V_DMA_CTRL_DSTWD_BYTE << MXC_F_DMA_CTRL_DSTWD_POS)

CTRL_DSTWD_BYTE Setting

◆ MXC_S_DMA_CTRL_DSTWD_HALFWORD

#define MXC_S_DMA_CTRL_DSTWD_HALFWORD   (MXC_V_DMA_CTRL_DSTWD_HALFWORD << MXC_F_DMA_CTRL_DSTWD_POS)

CTRL_DSTWD_HALFWORD Setting

◆ MXC_S_DMA_CTRL_DSTWD_WORD

#define MXC_S_DMA_CTRL_DSTWD_WORD   (MXC_V_DMA_CTRL_DSTWD_WORD << MXC_F_DMA_CTRL_DSTWD_POS)

CTRL_DSTWD_WORD Setting

◆ MXC_S_DMA_CTRL_PRI_HIGH

#define MXC_S_DMA_CTRL_PRI_HIGH   (MXC_V_DMA_CTRL_PRI_HIGH << MXC_F_DMA_CTRL_PRI_POS)

CTRL_PRI_HIGH Setting

◆ MXC_S_DMA_CTRL_PRI_LOW

#define MXC_S_DMA_CTRL_PRI_LOW   (MXC_V_DMA_CTRL_PRI_LOW << MXC_F_DMA_CTRL_PRI_POS)

CTRL_PRI_LOW Setting

◆ MXC_S_DMA_CTRL_PRI_MEDHIGH

#define MXC_S_DMA_CTRL_PRI_MEDHIGH   (MXC_V_DMA_CTRL_PRI_MEDHIGH << MXC_F_DMA_CTRL_PRI_POS)

CTRL_PRI_MEDHIGH Setting

◆ MXC_S_DMA_CTRL_PRI_MEDLOW

#define MXC_S_DMA_CTRL_PRI_MEDLOW   (MXC_V_DMA_CTRL_PRI_MEDLOW << MXC_F_DMA_CTRL_PRI_POS)

CTRL_PRI_MEDLOW Setting

◆ MXC_S_DMA_CTRL_REQUEST_ADC

#define MXC_S_DMA_CTRL_REQUEST_ADC   (MXC_V_DMA_CTRL_REQUEST_ADC << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_ADC Setting

◆ MXC_S_DMA_CTRL_REQUEST_AESRX

#define MXC_S_DMA_CTRL_REQUEST_AESRX   (MXC_V_DMA_CTRL_REQUEST_AESRX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_AESRX Setting

◆ MXC_S_DMA_CTRL_REQUEST_AESTX

#define MXC_S_DMA_CTRL_REQUEST_AESTX   (MXC_V_DMA_CTRL_REQUEST_AESTX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_AESTX Setting

◆ MXC_S_DMA_CTRL_REQUEST_CRCTX

#define MXC_S_DMA_CTRL_REQUEST_CRCTX   (MXC_V_DMA_CTRL_REQUEST_CRCTX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_CRCTX Setting

◆ MXC_S_DMA_CTRL_REQUEST_I2C0RX

#define MXC_S_DMA_CTRL_REQUEST_I2C0RX   (MXC_V_DMA_CTRL_REQUEST_I2C0RX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_I2C0RX Setting

◆ MXC_S_DMA_CTRL_REQUEST_I2C0TX

#define MXC_S_DMA_CTRL_REQUEST_I2C0TX   (MXC_V_DMA_CTRL_REQUEST_I2C0TX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_I2C0TX Setting

◆ MXC_S_DMA_CTRL_REQUEST_I2C1RX

#define MXC_S_DMA_CTRL_REQUEST_I2C1RX   (MXC_V_DMA_CTRL_REQUEST_I2C1RX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_I2C1RX Setting

◆ MXC_S_DMA_CTRL_REQUEST_I2C1TX

#define MXC_S_DMA_CTRL_REQUEST_I2C1TX   (MXC_V_DMA_CTRL_REQUEST_I2C1TX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_I2C1TX Setting

◆ MXC_S_DMA_CTRL_REQUEST_I2C2RX

#define MXC_S_DMA_CTRL_REQUEST_I2C2RX   (MXC_V_DMA_CTRL_REQUEST_I2C2RX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_I2C2RX Setting

◆ MXC_S_DMA_CTRL_REQUEST_I2C2TX

#define MXC_S_DMA_CTRL_REQUEST_I2C2TX   (MXC_V_DMA_CTRL_REQUEST_I2C2TX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_I2C2TX Setting

◆ MXC_S_DMA_CTRL_REQUEST_I2SRX

#define MXC_S_DMA_CTRL_REQUEST_I2SRX   (MXC_V_DMA_CTRL_REQUEST_I2SRX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_I2SRX Setting

◆ MXC_S_DMA_CTRL_REQUEST_I2STX

#define MXC_S_DMA_CTRL_REQUEST_I2STX   (MXC_V_DMA_CTRL_REQUEST_I2STX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_I2STX Setting

◆ MXC_S_DMA_CTRL_REQUEST_MEMTOMEM

#define MXC_S_DMA_CTRL_REQUEST_MEMTOMEM   (MXC_V_DMA_CTRL_REQUEST_MEMTOMEM << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_MEMTOMEM Setting

◆ MXC_S_DMA_CTRL_REQUEST_SPI0RX

#define MXC_S_DMA_CTRL_REQUEST_SPI0RX   (MXC_V_DMA_CTRL_REQUEST_SPI0RX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_SPI0RX Setting

◆ MXC_S_DMA_CTRL_REQUEST_SPI0TX

#define MXC_S_DMA_CTRL_REQUEST_SPI0TX   (MXC_V_DMA_CTRL_REQUEST_SPI0TX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_SPI0TX Setting

◆ MXC_S_DMA_CTRL_REQUEST_SPI1RX

#define MXC_S_DMA_CTRL_REQUEST_SPI1RX   (MXC_V_DMA_CTRL_REQUEST_SPI1RX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_SPI1RX Setting

◆ MXC_S_DMA_CTRL_REQUEST_SPI1TX

#define MXC_S_DMA_CTRL_REQUEST_SPI1TX   (MXC_V_DMA_CTRL_REQUEST_SPI1TX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_SPI1TX Setting

◆ MXC_S_DMA_CTRL_REQUEST_UART0RX

#define MXC_S_DMA_CTRL_REQUEST_UART0RX   (MXC_V_DMA_CTRL_REQUEST_UART0RX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_UART0RX Setting

◆ MXC_S_DMA_CTRL_REQUEST_UART0TX

#define MXC_S_DMA_CTRL_REQUEST_UART0TX   (MXC_V_DMA_CTRL_REQUEST_UART0TX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_UART0TX Setting

◆ MXC_S_DMA_CTRL_REQUEST_UART1RX

#define MXC_S_DMA_CTRL_REQUEST_UART1RX   (MXC_V_DMA_CTRL_REQUEST_UART1RX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_UART1RX Setting

◆ MXC_S_DMA_CTRL_REQUEST_UART1TX

#define MXC_S_DMA_CTRL_REQUEST_UART1TX   (MXC_V_DMA_CTRL_REQUEST_UART1TX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_UART1TX Setting

◆ MXC_S_DMA_CTRL_REQUEST_UART2RX

#define MXC_S_DMA_CTRL_REQUEST_UART2RX   (MXC_V_DMA_CTRL_REQUEST_UART2RX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_UART2RX Setting

◆ MXC_S_DMA_CTRL_REQUEST_UART2TX

#define MXC_S_DMA_CTRL_REQUEST_UART2TX   (MXC_V_DMA_CTRL_REQUEST_UART2TX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_UART2TX Setting

◆ MXC_S_DMA_CTRL_REQUEST_UART3RX

#define MXC_S_DMA_CTRL_REQUEST_UART3RX   (MXC_V_DMA_CTRL_REQUEST_UART3RX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_UART3RX Setting

◆ MXC_S_DMA_CTRL_REQUEST_UART3TX

#define MXC_S_DMA_CTRL_REQUEST_UART3TX   (MXC_V_DMA_CTRL_REQUEST_UART3TX << MXC_F_DMA_CTRL_REQUEST_POS)

CTRL_REQUEST_UART3TX Setting

◆ MXC_S_DMA_CTRL_SRCWD_BYTE

#define MXC_S_DMA_CTRL_SRCWD_BYTE   (MXC_V_DMA_CTRL_SRCWD_BYTE << MXC_F_DMA_CTRL_SRCWD_POS)

CTRL_SRCWD_BYTE Setting

◆ MXC_S_DMA_CTRL_SRCWD_HALFWORD

#define MXC_S_DMA_CTRL_SRCWD_HALFWORD   (MXC_V_DMA_CTRL_SRCWD_HALFWORD << MXC_F_DMA_CTRL_SRCWD_POS)

CTRL_SRCWD_HALFWORD Setting

◆ MXC_S_DMA_CTRL_SRCWD_WORD

#define MXC_S_DMA_CTRL_SRCWD_WORD   (MXC_V_DMA_CTRL_SRCWD_WORD << MXC_F_DMA_CTRL_SRCWD_POS)

CTRL_SRCWD_WORD Setting

◆ MXC_S_DMA_CTRL_TO_CLKDIV_DIS

#define MXC_S_DMA_CTRL_TO_CLKDIV_DIS   (MXC_V_DMA_CTRL_TO_CLKDIV_DIS << MXC_F_DMA_CTRL_TO_CLKDIV_POS)

CTRL_TO_CLKDIV_DIS Setting

◆ MXC_S_DMA_CTRL_TO_CLKDIV_DIV16M

#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV16M   (MXC_V_DMA_CTRL_TO_CLKDIV_DIV16M << MXC_F_DMA_CTRL_TO_CLKDIV_POS)

CTRL_TO_CLKDIV_DIV16M Setting

◆ MXC_S_DMA_CTRL_TO_CLKDIV_DIV256

#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV256   (MXC_V_DMA_CTRL_TO_CLKDIV_DIV256 << MXC_F_DMA_CTRL_TO_CLKDIV_POS)

CTRL_TO_CLKDIV_DIV256 Setting

◆ MXC_S_DMA_CTRL_TO_CLKDIV_DIV64K

#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV64K   (MXC_V_DMA_CTRL_TO_CLKDIV_DIV64K << MXC_F_DMA_CTRL_TO_CLKDIV_POS)

CTRL_TO_CLKDIV_DIV64K Setting

◆ MXC_S_DMA_CTRL_TO_PER_TO128

#define MXC_S_DMA_CTRL_TO_PER_TO128   (MXC_V_DMA_CTRL_TO_PER_TO128 << MXC_F_DMA_CTRL_TO_PER_POS)

CTRL_TO_PER_TO128 Setting

◆ MXC_S_DMA_CTRL_TO_PER_TO16

#define MXC_S_DMA_CTRL_TO_PER_TO16   (MXC_V_DMA_CTRL_TO_PER_TO16 << MXC_F_DMA_CTRL_TO_PER_POS)

CTRL_TO_PER_TO16 Setting

◆ MXC_S_DMA_CTRL_TO_PER_TO256

#define MXC_S_DMA_CTRL_TO_PER_TO256   (MXC_V_DMA_CTRL_TO_PER_TO256 << MXC_F_DMA_CTRL_TO_PER_POS)

CTRL_TO_PER_TO256 Setting

◆ MXC_S_DMA_CTRL_TO_PER_TO32

#define MXC_S_DMA_CTRL_TO_PER_TO32   (MXC_V_DMA_CTRL_TO_PER_TO32 << MXC_F_DMA_CTRL_TO_PER_POS)

CTRL_TO_PER_TO32 Setting

◆ MXC_S_DMA_CTRL_TO_PER_TO4

#define MXC_S_DMA_CTRL_TO_PER_TO4   (MXC_V_DMA_CTRL_TO_PER_TO4 << MXC_F_DMA_CTRL_TO_PER_POS)

CTRL_TO_PER_TO4 Setting

◆ MXC_S_DMA_CTRL_TO_PER_TO512

#define MXC_S_DMA_CTRL_TO_PER_TO512   (MXC_V_DMA_CTRL_TO_PER_TO512 << MXC_F_DMA_CTRL_TO_PER_POS)

CTRL_TO_PER_TO512 Setting

◆ MXC_S_DMA_CTRL_TO_PER_TO64

#define MXC_S_DMA_CTRL_TO_PER_TO64   (MXC_V_DMA_CTRL_TO_PER_TO64 << MXC_F_DMA_CTRL_TO_PER_POS)

CTRL_TO_PER_TO64 Setting

◆ MXC_S_DMA_CTRL_TO_PER_TO8

#define MXC_S_DMA_CTRL_TO_PER_TO8   (MXC_V_DMA_CTRL_TO_PER_TO8 << MXC_F_DMA_CTRL_TO_PER_POS)

CTRL_TO_PER_TO8 Setting

◆ MXC_V_DMA_CTRL_DSTWD_BYTE

#define MXC_V_DMA_CTRL_DSTWD_BYTE   ((uint32_t)0x0UL)

CTRL_DSTWD_BYTE Value

◆ MXC_V_DMA_CTRL_DSTWD_HALFWORD

#define MXC_V_DMA_CTRL_DSTWD_HALFWORD   ((uint32_t)0x1UL)

CTRL_DSTWD_HALFWORD Value

◆ MXC_V_DMA_CTRL_DSTWD_WORD

#define MXC_V_DMA_CTRL_DSTWD_WORD   ((uint32_t)0x2UL)

CTRL_DSTWD_WORD Value

◆ MXC_V_DMA_CTRL_PRI_HIGH

#define MXC_V_DMA_CTRL_PRI_HIGH   ((uint32_t)0x0UL)

CTRL_PRI_HIGH Value

◆ MXC_V_DMA_CTRL_PRI_LOW

#define MXC_V_DMA_CTRL_PRI_LOW   ((uint32_t)0x3UL)

CTRL_PRI_LOW Value

◆ MXC_V_DMA_CTRL_PRI_MEDHIGH

#define MXC_V_DMA_CTRL_PRI_MEDHIGH   ((uint32_t)0x1UL)

CTRL_PRI_MEDHIGH Value

◆ MXC_V_DMA_CTRL_PRI_MEDLOW

#define MXC_V_DMA_CTRL_PRI_MEDLOW   ((uint32_t)0x2UL)

CTRL_PRI_MEDLOW Value

◆ MXC_V_DMA_CTRL_REQUEST_ADC

#define MXC_V_DMA_CTRL_REQUEST_ADC   ((uint32_t)0x9UL)

CTRL_REQUEST_ADC Value

◆ MXC_V_DMA_CTRL_REQUEST_AESRX

#define MXC_V_DMA_CTRL_REQUEST_AESRX   ((uint32_t)0x10UL)

CTRL_REQUEST_AESRX Value

◆ MXC_V_DMA_CTRL_REQUEST_AESTX

#define MXC_V_DMA_CTRL_REQUEST_AESTX   ((uint32_t)0x30UL)

CTRL_REQUEST_AESTX Value

◆ MXC_V_DMA_CTRL_REQUEST_CRCTX

#define MXC_V_DMA_CTRL_REQUEST_CRCTX   ((uint32_t)0x2CUL)

CTRL_REQUEST_CRCTX Value

◆ MXC_V_DMA_CTRL_REQUEST_I2C0RX

#define MXC_V_DMA_CTRL_REQUEST_I2C0RX   ((uint32_t)0x7UL)

CTRL_REQUEST_I2C0RX Value

◆ MXC_V_DMA_CTRL_REQUEST_I2C0TX

#define MXC_V_DMA_CTRL_REQUEST_I2C0TX   ((uint32_t)0x27UL)

CTRL_REQUEST_I2C0TX Value

◆ MXC_V_DMA_CTRL_REQUEST_I2C1RX

#define MXC_V_DMA_CTRL_REQUEST_I2C1RX   ((uint32_t)0x8UL)

CTRL_REQUEST_I2C1RX Value

◆ MXC_V_DMA_CTRL_REQUEST_I2C1TX

#define MXC_V_DMA_CTRL_REQUEST_I2C1TX   ((uint32_t)0x28UL)

CTRL_REQUEST_I2C1TX Value

◆ MXC_V_DMA_CTRL_REQUEST_I2C2RX

#define MXC_V_DMA_CTRL_REQUEST_I2C2RX   ((uint32_t)0xAUL)

CTRL_REQUEST_I2C2RX Value

◆ MXC_V_DMA_CTRL_REQUEST_I2C2TX

#define MXC_V_DMA_CTRL_REQUEST_I2C2TX   ((uint32_t)0x2AUL)

CTRL_REQUEST_I2C2TX Value

◆ MXC_V_DMA_CTRL_REQUEST_I2SRX

#define MXC_V_DMA_CTRL_REQUEST_I2SRX   ((uint32_t)0x1EUL)

CTRL_REQUEST_I2SRX Value

◆ MXC_V_DMA_CTRL_REQUEST_I2STX

#define MXC_V_DMA_CTRL_REQUEST_I2STX   ((uint32_t)0x3EUL)

CTRL_REQUEST_I2STX Value

◆ MXC_V_DMA_CTRL_REQUEST_MEMTOMEM

#define MXC_V_DMA_CTRL_REQUEST_MEMTOMEM   ((uint32_t)0x0UL)

CTRL_REQUEST_MEMTOMEM Value

◆ MXC_V_DMA_CTRL_REQUEST_SPI0RX

#define MXC_V_DMA_CTRL_REQUEST_SPI0RX   ((uint32_t)0xFUL)

CTRL_REQUEST_SPI0RX Value

◆ MXC_V_DMA_CTRL_REQUEST_SPI0TX

#define MXC_V_DMA_CTRL_REQUEST_SPI0TX   ((uint32_t)0x2FUL)

CTRL_REQUEST_SPI0TX Value

◆ MXC_V_DMA_CTRL_REQUEST_SPI1RX

#define MXC_V_DMA_CTRL_REQUEST_SPI1RX   ((uint32_t)0x1UL)

CTRL_REQUEST_SPI1RX Value

◆ MXC_V_DMA_CTRL_REQUEST_SPI1TX

#define MXC_V_DMA_CTRL_REQUEST_SPI1TX   ((uint32_t)0x21UL)

CTRL_REQUEST_SPI1TX Value

◆ MXC_V_DMA_CTRL_REQUEST_UART0RX

#define MXC_V_DMA_CTRL_REQUEST_UART0RX   ((uint32_t)0x4UL)

CTRL_REQUEST_UART0RX Value

◆ MXC_V_DMA_CTRL_REQUEST_UART0TX

#define MXC_V_DMA_CTRL_REQUEST_UART0TX   ((uint32_t)0x24UL)

CTRL_REQUEST_UART0TX Value

◆ MXC_V_DMA_CTRL_REQUEST_UART1RX

#define MXC_V_DMA_CTRL_REQUEST_UART1RX   ((uint32_t)0x5UL)

CTRL_REQUEST_UART1RX Value

◆ MXC_V_DMA_CTRL_REQUEST_UART1TX

#define MXC_V_DMA_CTRL_REQUEST_UART1TX   ((uint32_t)0x25UL)

CTRL_REQUEST_UART1TX Value

◆ MXC_V_DMA_CTRL_REQUEST_UART2RX

#define MXC_V_DMA_CTRL_REQUEST_UART2RX   ((uint32_t)0xEUL)

CTRL_REQUEST_UART2RX Value

◆ MXC_V_DMA_CTRL_REQUEST_UART2TX

#define MXC_V_DMA_CTRL_REQUEST_UART2TX   ((uint32_t)0x2EUL)

CTRL_REQUEST_UART2TX Value

◆ MXC_V_DMA_CTRL_REQUEST_UART3RX

#define MXC_V_DMA_CTRL_REQUEST_UART3RX   ((uint32_t)0x1CUL)

CTRL_REQUEST_UART3RX Value

◆ MXC_V_DMA_CTRL_REQUEST_UART3TX

#define MXC_V_DMA_CTRL_REQUEST_UART3TX   ((uint32_t)0x3CUL)

CTRL_REQUEST_UART3TX Value

◆ MXC_V_DMA_CTRL_SRCWD_BYTE

#define MXC_V_DMA_CTRL_SRCWD_BYTE   ((uint32_t)0x0UL)

CTRL_SRCWD_BYTE Value

◆ MXC_V_DMA_CTRL_SRCWD_HALFWORD

#define MXC_V_DMA_CTRL_SRCWD_HALFWORD   ((uint32_t)0x1UL)

CTRL_SRCWD_HALFWORD Value

◆ MXC_V_DMA_CTRL_SRCWD_WORD

#define MXC_V_DMA_CTRL_SRCWD_WORD   ((uint32_t)0x2UL)

CTRL_SRCWD_WORD Value

◆ MXC_V_DMA_CTRL_TO_CLKDIV_DIS

#define MXC_V_DMA_CTRL_TO_CLKDIV_DIS   ((uint32_t)0x0UL)

CTRL_TO_CLKDIV_DIS Value

◆ MXC_V_DMA_CTRL_TO_CLKDIV_DIV16M

#define MXC_V_DMA_CTRL_TO_CLKDIV_DIV16M   ((uint32_t)0x3UL)

CTRL_TO_CLKDIV_DIV16M Value

◆ MXC_V_DMA_CTRL_TO_CLKDIV_DIV256

#define MXC_V_DMA_CTRL_TO_CLKDIV_DIV256   ((uint32_t)0x1UL)

CTRL_TO_CLKDIV_DIV256 Value

◆ MXC_V_DMA_CTRL_TO_CLKDIV_DIV64K

#define MXC_V_DMA_CTRL_TO_CLKDIV_DIV64K   ((uint32_t)0x2UL)

CTRL_TO_CLKDIV_DIV64K Value

◆ MXC_V_DMA_CTRL_TO_PER_TO128

#define MXC_V_DMA_CTRL_TO_PER_TO128   ((uint32_t)0x5UL)

CTRL_TO_PER_TO128 Value

◆ MXC_V_DMA_CTRL_TO_PER_TO16

#define MXC_V_DMA_CTRL_TO_PER_TO16   ((uint32_t)0x2UL)

CTRL_TO_PER_TO16 Value

◆ MXC_V_DMA_CTRL_TO_PER_TO256

#define MXC_V_DMA_CTRL_TO_PER_TO256   ((uint32_t)0x6UL)

CTRL_TO_PER_TO256 Value

◆ MXC_V_DMA_CTRL_TO_PER_TO32

#define MXC_V_DMA_CTRL_TO_PER_TO32   ((uint32_t)0x3UL)

CTRL_TO_PER_TO32 Value

◆ MXC_V_DMA_CTRL_TO_PER_TO4

#define MXC_V_DMA_CTRL_TO_PER_TO4   ((uint32_t)0x0UL)

CTRL_TO_PER_TO4 Value

◆ MXC_V_DMA_CTRL_TO_PER_TO512

#define MXC_V_DMA_CTRL_TO_PER_TO512   ((uint32_t)0x7UL)

CTRL_TO_PER_TO512 Value

◆ MXC_V_DMA_CTRL_TO_PER_TO64

#define MXC_V_DMA_CTRL_TO_PER_TO64   ((uint32_t)0x4UL)

CTRL_TO_PER_TO64 Value

◆ MXC_V_DMA_CTRL_TO_PER_TO8

#define MXC_V_DMA_CTRL_TO_PER_TO8   ((uint32_t)0x1UL)

CTRL_TO_PER_TO8 Value