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MAX32680 Peripheral Driver API
Peripheral Driver API for the MAX32680
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Macros | |
#define | MXC_F_FCR_FCTRL0_I2C0DGEN0_POS 20 |
#define | MXC_F_FCR_FCTRL0_I2C0DGEN0 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C0DGEN0_POS)) |
#define | MXC_F_FCR_FCTRL0_I2C0DGEN1_POS 21 |
#define | MXC_F_FCR_FCTRL0_I2C0DGEN1 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C0DGEN1_POS)) |
#define | MXC_F_FCR_FCTRL0_I2C1DGEN0_POS 22 |
#define | MXC_F_FCR_FCTRL0_I2C1DGEN0 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C1DGEN0_POS)) |
#define | MXC_F_FCR_FCTRL0_I2C1DGEN1_POS 23 |
#define | MXC_F_FCR_FCTRL0_I2C1DGEN1 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C1DGEN1_POS)) |
#define | MXC_F_FCR_FCTRL0_I2C2DGEN0_POS 24 |
#define | MXC_F_FCR_FCTRL0_I2C2DGEN0 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C2DGEN0_POS)) |
#define | MXC_F_FCR_FCTRL0_I2C2DGEN1_POS 25 |
#define | MXC_F_FCR_FCTRL0_I2C2DGEN1 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C2DGEN1_POS)) |
Function Control 0.
#define MXC_F_FCR_FCTRL0_I2C0DGEN0 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C0DGEN0_POS)) |
FCTRL0_I2C0DGEN0 Mask
#define MXC_F_FCR_FCTRL0_I2C0DGEN0_POS 20 |
FCTRL0_I2C0DGEN0 Position
#define MXC_F_FCR_FCTRL0_I2C0DGEN1 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C0DGEN1_POS)) |
FCTRL0_I2C0DGEN1 Mask
#define MXC_F_FCR_FCTRL0_I2C0DGEN1_POS 21 |
FCTRL0_I2C0DGEN1 Position
#define MXC_F_FCR_FCTRL0_I2C1DGEN0 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C1DGEN0_POS)) |
FCTRL0_I2C1DGEN0 Mask
#define MXC_F_FCR_FCTRL0_I2C1DGEN0_POS 22 |
FCTRL0_I2C1DGEN0 Position
#define MXC_F_FCR_FCTRL0_I2C1DGEN1 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C1DGEN1_POS)) |
FCTRL0_I2C1DGEN1 Mask
#define MXC_F_FCR_FCTRL0_I2C1DGEN1_POS 23 |
FCTRL0_I2C1DGEN1 Position
#define MXC_F_FCR_FCTRL0_I2C2DGEN0 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C2DGEN0_POS)) |
FCTRL0_I2C2DGEN0 Mask
#define MXC_F_FCR_FCTRL0_I2C2DGEN0_POS 24 |
FCTRL0_I2C2DGEN0 Position
#define MXC_F_FCR_FCTRL0_I2C2DGEN1 ((uint32_t)(0x1UL << MXC_F_FCR_FCTRL0_I2C2DGEN1_POS)) |
FCTRL0_I2C2DGEN1 Mask
#define MXC_F_FCR_FCTRL0_I2C2DGEN1_POS 25 |
FCTRL0_I2C2DGEN1 Position