I2S_DMACH0

Macros
#define	MXC_F_I2S_DMACH0_DMA_TX_THD_VAL_POS   0
#define	MXC_F_I2S_DMACH0_DMA_TX_THD_VAL   ((uint32_t)(0x7FUL << MXC_F_I2S_DMACH0_DMA_TX_THD_VAL_POS))
#define	MXC_F_I2S_DMACH0_DMA_TX_EN_POS   7
#define	MXC_F_I2S_DMACH0_DMA_TX_EN   ((uint32_t)(0x1UL << MXC_F_I2S_DMACH0_DMA_TX_EN_POS))
#define	MXC_F_I2S_DMACH0_DMA_RX_THD_VAL_POS   8
#define	MXC_F_I2S_DMACH0_DMA_RX_THD_VAL   ((uint32_t)(0x7FUL << MXC_F_I2S_DMACH0_DMA_RX_THD_VAL_POS))
#define	MXC_F_I2S_DMACH0_DMA_RX_EN_POS   15
#define	MXC_F_I2S_DMACH0_DMA_RX_EN   ((uint32_t)(0x1UL << MXC_F_I2S_DMACH0_DMA_RX_EN_POS))
#define	MXC_F_I2S_DMACH0_TX_LVL_POS   16
#define	MXC_F_I2S_DMACH0_TX_LVL   ((uint32_t)(0xFFUL << MXC_F_I2S_DMACH0_TX_LVL_POS))
#define	MXC_F_I2S_DMACH0_RX_LVL_POS   24
#define	MXC_F_I2S_DMACH0_RX_LVL   ((uint32_t)(0xFFUL << MXC_F_I2S_DMACH0_RX_LVL_POS))

Detailed Description

DMA Control.

Macro Definition Documentation

MXC_F_I2S_DMACH0_DMA_RX_EN

#define MXC_F_I2S_DMACH0_DMA_RX_EN   ((uint32_t)(0x1UL << MXC_F_I2S_DMACH0_DMA_RX_EN_POS))

DMACH0_DMA_RX_EN Mask

MXC_F_I2S_DMACH0_DMA_RX_EN_POS

#define MXC_F_I2S_DMACH0_DMA_RX_EN_POS   15

DMACH0_DMA_RX_EN Position

MXC_F_I2S_DMACH0_DMA_RX_THD_VAL

#define MXC_F_I2S_DMACH0_DMA_RX_THD_VAL   ((uint32_t)(0x7FUL << MXC_F_I2S_DMACH0_DMA_RX_THD_VAL_POS))

DMACH0_DMA_RX_THD_VAL Mask

MXC_F_I2S_DMACH0_DMA_RX_THD_VAL_POS

#define MXC_F_I2S_DMACH0_DMA_RX_THD_VAL_POS   8

DMACH0_DMA_RX_THD_VAL Position

MXC_F_I2S_DMACH0_DMA_TX_EN

#define MXC_F_I2S_DMACH0_DMA_TX_EN   ((uint32_t)(0x1UL << MXC_F_I2S_DMACH0_DMA_TX_EN_POS))

DMACH0_DMA_TX_EN Mask

MXC_F_I2S_DMACH0_DMA_TX_EN_POS

#define MXC_F_I2S_DMACH0_DMA_TX_EN_POS   7

DMACH0_DMA_TX_EN Position

MXC_F_I2S_DMACH0_DMA_TX_THD_VAL

#define MXC_F_I2S_DMACH0_DMA_TX_THD_VAL   ((uint32_t)(0x7FUL << MXC_F_I2S_DMACH0_DMA_TX_THD_VAL_POS))

DMACH0_DMA_TX_THD_VAL Mask

MXC_F_I2S_DMACH0_DMA_TX_THD_VAL_POS

#define MXC_F_I2S_DMACH0_DMA_TX_THD_VAL_POS   0

DMACH0_DMA_TX_THD_VAL Position

MXC_F_I2S_DMACH0_RX_LVL

#define MXC_F_I2S_DMACH0_RX_LVL   ((uint32_t)(0xFFUL << MXC_F_I2S_DMACH0_RX_LVL_POS))

DMACH0_RX_LVL Mask

MXC_F_I2S_DMACH0_RX_LVL_POS

#define MXC_F_I2S_DMACH0_RX_LVL_POS   24

DMACH0_RX_LVL Position

MXC_F_I2S_DMACH0_TX_LVL

#define MXC_F_I2S_DMACH0_TX_LVL   ((uint32_t)(0xFFUL << MXC_F_I2S_DMACH0_TX_LVL_POS))

DMACH0_TX_LVL Mask

MXC_F_I2S_DMACH0_TX_LVL_POS

#define MXC_F_I2S_DMACH0_TX_LVL_POS   16

DMACH0_TX_LVL Position