27#ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32680_LPCMP_H_
28#define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32680_LPCMP_H_
44 MXC_LPCMP_POL_RISE = 0,
45 MXC_LPCMP_POL_FALL = 1,
46} mxc_lpcmp_polarity_t;
66typedef volatile uint32_t *mxc_lpcmp_ctrl_reg_t;
75int MXC_LPCMP_Init(mxc_lpcmp_cmpsel_t cmp);
84int MXC_LPCMP_Shutdown(mxc_lpcmp_cmpsel_t cmp);
92int MXC_LPCMP_EnableInt(mxc_lpcmp_cmpsel_t cmp, mxc_lpcmp_polarity_t pol);
99int MXC_LPCMP_DisableInt(mxc_lpcmp_cmpsel_t cmp);
108int MXC_LPCMP_GetFlags(mxc_lpcmp_cmpsel_t cmp);
115int MXC_LPCMP_ClearFlags(mxc_lpcmp_cmpsel_t cmp);
123int MXC_LPCMP_SelectPolarity(mxc_lpcmp_cmpsel_t cmp, mxc_lpcmp_polarity_t pol);
Registers, Bit Masks and Bit Positions for the LPCMP Peripheral Module.
Registers, Bit Masks and Bit Positions for the MCR Peripheral Module.