lpgcr_regs.h

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/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32680_INCLUDE_LPGCR_REGS_H_
#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32680_INCLUDE_LPGCR_REGS_H_
 
/* **** Includes **** */
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined (__ICCARM__)
  #pragma system_include
#endif
 
#if defined (__CC_ARM)
  #pragma anon_unions
#endif
/*
    If types are not defined elsewhere (CMSIS) define them here
*/
#ifndef __IO
#define __IO volatile
#endif
#ifndef __I
#define __I  volatile const
#endif
#ifndef __O
#define __O  volatile
#endif
#ifndef __R
#define __R  volatile const
#endif
 
/* **** Definitions **** */
 
typedef struct {
    __R  uint32_t rsv_0x0_0x7[2];
    __IO uint32_t rst;                  
    __IO uint32_t pclkdis;              
} mxc_lpgcr_regs_t;
 
/* Register offsets for module LPGCR */
#define MXC_R_LPGCR_RST                    ((uint32_t)0x00000008UL) 
#define MXC_R_LPGCR_PCLKDIS                ((uint32_t)0x0000000CUL) 
#define MXC_F_LPGCR_RST_GPIO2_POS                      0 
#define MXC_F_LPGCR_RST_GPIO2                          ((uint32_t)(0x1UL << MXC_F_LPGCR_RST_GPIO2_POS)) 
#define MXC_F_LPGCR_RST_WDT1_POS                       1 
#define MXC_F_LPGCR_RST_WDT1                           ((uint32_t)(0x1UL << MXC_F_LPGCR_RST_WDT1_POS)) 
#define MXC_F_LPGCR_RST_TMR4_POS                       2 
#define MXC_F_LPGCR_RST_TMR4                           ((uint32_t)(0x1UL << MXC_F_LPGCR_RST_TMR4_POS)) 
#define MXC_F_LPGCR_RST_TMR5_POS                       3 
#define MXC_F_LPGCR_RST_TMR5                           ((uint32_t)(0x1UL << MXC_F_LPGCR_RST_TMR5_POS)) 
#define MXC_F_LPGCR_RST_UART3_POS                      4 
#define MXC_F_LPGCR_RST_UART3                          ((uint32_t)(0x1UL << MXC_F_LPGCR_RST_UART3_POS)) 
#define MXC_F_LPGCR_RST_LPCOMP_POS                     6 
#define MXC_F_LPGCR_RST_LPCOMP                         ((uint32_t)(0x1UL << MXC_F_LPGCR_RST_LPCOMP_POS)) 
#define MXC_F_LPGCR_PCLKDIS_GPIO2_POS                  0 
#define MXC_F_LPGCR_PCLKDIS_GPIO2                      ((uint32_t)(0x1UL << MXC_F_LPGCR_PCLKDIS_GPIO2_POS)) 
#define MXC_F_LPGCR_PCLKDIS_WDT1_POS                   1 
#define MXC_F_LPGCR_PCLKDIS_WDT1                       ((uint32_t)(0x1UL << MXC_F_LPGCR_PCLKDIS_WDT1_POS)) 
#define MXC_F_LPGCR_PCLKDIS_TMR4_POS                   2 
#define MXC_F_LPGCR_PCLKDIS_TMR4                       ((uint32_t)(0x1UL << MXC_F_LPGCR_PCLKDIS_TMR4_POS)) 
#define MXC_F_LPGCR_PCLKDIS_TMR5_POS                   3 
#define MXC_F_LPGCR_PCLKDIS_TMR5                       ((uint32_t)(0x1UL << MXC_F_LPGCR_PCLKDIS_TMR5_POS)) 
#define MXC_F_LPGCR_PCLKDIS_UART3_POS                  4 
#define MXC_F_LPGCR_PCLKDIS_UART3                      ((uint32_t)(0x1UL << MXC_F_LPGCR_PCLKDIS_UART3_POS)) 
#define MXC_F_LPGCR_PCLKDIS_LPCOMP_POS                 6 
#define MXC_F_LPGCR_PCLKDIS_LPCOMP                     ((uint32_t)(0x1UL << MXC_F_LPGCR_PCLKDIS_LPCOMP_POS)) 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32680_INCLUDE_LPGCR_REGS_H_