MAX32680 Peripheral Driver API
Peripheral Driver API for the MAX32680
ptg_regs.h
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1
8/******************************************************************************
9 *
10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
11 * Analog Devices, Inc.),
12 * Copyright (C) 2023-2024 Analog Devices, Inc.
13 *
14 * Licensed under the Apache License, Version 2.0 (the "License");
15 * you may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at
17 *
18 * http://www.apache.org/licenses/LICENSE-2.0
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *
26 ******************************************************************************/
27
28#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32680_INCLUDE_PTG_REGS_H_
29#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32680_INCLUDE_PTG_REGS_H_
30
31/* **** Includes **** */
32#include <stdint.h>
33
34#ifdef __cplusplus
35extern "C" {
36#endif
37
38#if defined (__ICCARM__)
39 #pragma system_include
40#endif
41
42#if defined (__CC_ARM)
43 #pragma anon_unions
44#endif
46/*
47 If types are not defined elsewhere (CMSIS) define them here
48*/
49#ifndef __IO
50#define __IO volatile
51#endif
52#ifndef __I
53#define __I volatile const
54#endif
55#ifndef __O
56#define __O volatile
57#endif
58#ifndef __R
59#define __R volatile const
60#endif
62
63/* **** Definitions **** */
64
76typedef struct {
77 __IO uint32_t enable;
78 __IO uint32_t resync;
79 __IO uint32_t intfl;
80 __IO uint32_t inten;
81 __O uint32_t safe_en;
82 __O uint32_t safe_dis;
83} mxc_ptg_regs_t;
84
85/* Register offsets for module PTG */
92#define MXC_R_PTG_ENABLE ((uint32_t)0x00000000UL)
93#define MXC_R_PTG_RESYNC ((uint32_t)0x00000004UL)
94#define MXC_R_PTG_INTFL ((uint32_t)0x00000008UL)
95#define MXC_R_PTG_INTEN ((uint32_t)0x0000000CUL)
96#define MXC_R_PTG_SAFE_EN ((uint32_t)0x00000010UL)
97#define MXC_R_PTG_SAFE_DIS ((uint32_t)0x00000014UL)
106#define MXC_F_PTG_ENABLE_PT0_POS 0
107#define MXC_F_PTG_ENABLE_PT0 ((uint32_t)(0x1UL << MXC_F_PTG_ENABLE_PT0_POS))
109#define MXC_F_PTG_ENABLE_PT1_POS 1
110#define MXC_F_PTG_ENABLE_PT1 ((uint32_t)(0x1UL << MXC_F_PTG_ENABLE_PT1_POS))
112#define MXC_F_PTG_ENABLE_PT2_POS 2
113#define MXC_F_PTG_ENABLE_PT2 ((uint32_t)(0x1UL << MXC_F_PTG_ENABLE_PT2_POS))
115#define MXC_F_PTG_ENABLE_PT3_POS 3
116#define MXC_F_PTG_ENABLE_PT3 ((uint32_t)(0x1UL << MXC_F_PTG_ENABLE_PT3_POS))
126#define MXC_F_PTG_RESYNC_PT0_POS 0
127#define MXC_F_PTG_RESYNC_PT0 ((uint32_t)(0x1UL << MXC_F_PTG_RESYNC_PT0_POS))
129#define MXC_F_PTG_RESYNC_PT1_POS 1
130#define MXC_F_PTG_RESYNC_PT1 ((uint32_t)(0x1UL << MXC_F_PTG_RESYNC_PT1_POS))
132#define MXC_F_PTG_RESYNC_PT2_POS 2
133#define MXC_F_PTG_RESYNC_PT2 ((uint32_t)(0x1UL << MXC_F_PTG_RESYNC_PT2_POS))
135#define MXC_F_PTG_RESYNC_PT3_POS 3
136#define MXC_F_PTG_RESYNC_PT3 ((uint32_t)(0x1UL << MXC_F_PTG_RESYNC_PT3_POS))
146#define MXC_F_PTG_INTFL_PT0_POS 0
147#define MXC_F_PTG_INTFL_PT0 ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT0_POS))
149#define MXC_F_PTG_INTFL_PT1_POS 1
150#define MXC_F_PTG_INTFL_PT1 ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT1_POS))
152#define MXC_F_PTG_INTFL_PT2_POS 2
153#define MXC_F_PTG_INTFL_PT2 ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT2_POS))
155#define MXC_F_PTG_INTFL_PT3_POS 3
156#define MXC_F_PTG_INTFL_PT3 ((uint32_t)(0x1UL << MXC_F_PTG_INTFL_PT3_POS))
166#define MXC_F_PTG_INTEN_PT0_POS 0
167#define MXC_F_PTG_INTEN_PT0 ((uint32_t)(0x1UL << MXC_F_PTG_INTEN_PT0_POS))
169#define MXC_F_PTG_INTEN_PT1_POS 1
170#define MXC_F_PTG_INTEN_PT1 ((uint32_t)(0x1UL << MXC_F_PTG_INTEN_PT1_POS))
172#define MXC_F_PTG_INTEN_PT2_POS 2
173#define MXC_F_PTG_INTEN_PT2 ((uint32_t)(0x1UL << MXC_F_PTG_INTEN_PT2_POS))
175#define MXC_F_PTG_INTEN_PT3_POS 3
176#define MXC_F_PTG_INTEN_PT3 ((uint32_t)(0x1UL << MXC_F_PTG_INTEN_PT3_POS))
186#define MXC_F_PTG_SAFE_EN_PT0_POS 0
187#define MXC_F_PTG_SAFE_EN_PT0 ((uint32_t)(0x1UL << MXC_F_PTG_SAFE_EN_PT0_POS))
189#define MXC_F_PTG_SAFE_EN_PT1_POS 1
190#define MXC_F_PTG_SAFE_EN_PT1 ((uint32_t)(0x1UL << MXC_F_PTG_SAFE_EN_PT1_POS))
192#define MXC_F_PTG_SAFE_EN_PT2_POS 2
193#define MXC_F_PTG_SAFE_EN_PT2 ((uint32_t)(0x1UL << MXC_F_PTG_SAFE_EN_PT2_POS))
195#define MXC_F_PTG_SAFE_EN_PT3_POS 3
196#define MXC_F_PTG_SAFE_EN_PT3 ((uint32_t)(0x1UL << MXC_F_PTG_SAFE_EN_PT3_POS))
206#define MXC_F_PTG_SAFE_DIS_PT0_POS 0
207#define MXC_F_PTG_SAFE_DIS_PT0 ((uint32_t)(0x1UL << MXC_F_PTG_SAFE_DIS_PT0_POS))
209#define MXC_F_PTG_SAFE_DIS_PT1_POS 1
210#define MXC_F_PTG_SAFE_DIS_PT1 ((uint32_t)(0x1UL << MXC_F_PTG_SAFE_DIS_PT1_POS))
212#define MXC_F_PTG_SAFE_DIS_PT2_POS 2
213#define MXC_F_PTG_SAFE_DIS_PT2 ((uint32_t)(0x1UL << MXC_F_PTG_SAFE_DIS_PT2_POS))
215#define MXC_F_PTG_SAFE_DIS_PT3_POS 3
216#define MXC_F_PTG_SAFE_DIS_PT3 ((uint32_t)(0x1UL << MXC_F_PTG_SAFE_DIS_PT3_POS))
220#ifdef __cplusplus
221}
222#endif
223
224#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32680_INCLUDE_PTG_REGS_H_
mxc_ptg_regs_t::safe_dis
__O uint32_t safe_dis
Definition: ptg_regs.h:82
mxc_ptg_regs_t::intfl
__IO uint32_t intfl
Definition: ptg_regs.h:79
mxc_ptg_regs_t::resync
__IO uint32_t resync
Definition: ptg_regs.h:78
mxc_ptg_regs_t::safe_en
__O uint32_t safe_en
Definition: ptg_regs.h:81
mxc_ptg_regs_t::inten
__IO uint32_t inten
Definition: ptg_regs.h:80
mxc_ptg_regs_t::enable
__IO uint32_t enable
Definition: ptg_regs.h:77
mxc_ptg_regs_t
Definition: ptg_regs.h:76