Macros
#define	MXC_R_ADC_CTRL0 ((uint32_t)0x00000000UL)

#define	MXC_R_ADC_CTRL1 ((uint32_t)0x00000004UL)

#define	MXC_R_ADC_CLKCTRL ((uint32_t)0x00000008UL)

#define	MXC_R_ADC_SAMPCLKCTRL ((uint32_t)0x0000000CUL)

#define	MXC_R_ADC_CHSEL0 ((uint32_t)0x00000010UL)

#define	MXC_R_ADC_CHSEL1 ((uint32_t)0x00000014UL)

#define	MXC_R_ADC_CHSEL2 ((uint32_t)0x00000018UL)

#define	MXC_R_ADC_CHSEL3 ((uint32_t)0x0000001CUL)

#define	MXC_R_ADC_RESTART ((uint32_t)0x00000030UL)

#define	MXC_R_ADC_DATAFMT ((uint32_t)0x0000003CUL)

#define	MXC_R_ADC_FIFODMACTRL ((uint32_t)0x00000040UL)

#define	MXC_R_ADC_DATA ((uint32_t)0x00000044UL)

#define	MXC_R_ADC_STATUS ((uint32_t)0x00000048UL)

#define	MXC_R_ADC_CHSTATUS ((uint32_t)0x0000004CUL)

#define	MXC_R_ADC_INTEN ((uint32_t)0x00000050UL)

#define	MXC_R_ADC_INTFL ((uint32_t)0x00000054UL)

#define	MXC_R_ADC_SFRADDROFFSET ((uint32_t)0x00000060UL)

#define	MXC_R_ADC_SFRADDR ((uint32_t)0x00000064UL)

#define	MXC_R_ADC_SFRWRDATA ((uint32_t)0x00000068UL)

#define	MXC_R_ADC_SFRRDDATA ((uint32_t)0x0000006CUL)

#define	MXC_R_ADC_SFRSTATUS ((uint32_t)0x00000070UL)

Detailed Description

ADC Peripheral Register Offsets from the ADC Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_ADC_CHSEL0

#define MXC_R_ADC_CHSEL0 ((uint32_t)0x00000010UL)

Offset from ADC Base Address: 0x0010

◆ MXC_R_ADC_CHSEL1

#define MXC_R_ADC_CHSEL1 ((uint32_t)0x00000014UL)

Offset from ADC Base Address: 0x0014

◆ MXC_R_ADC_CHSEL2

#define MXC_R_ADC_CHSEL2 ((uint32_t)0x00000018UL)

Offset from ADC Base Address: 0x0018

◆ MXC_R_ADC_CHSEL3

#define MXC_R_ADC_CHSEL3 ((uint32_t)0x0000001CUL)

Offset from ADC Base Address: 0x001C

◆ MXC_R_ADC_CHSTATUS

#define MXC_R_ADC_CHSTATUS ((uint32_t)0x0000004CUL)

Offset from ADC Base Address: 0x004C

◆ MXC_R_ADC_CLKCTRL

#define MXC_R_ADC_CLKCTRL ((uint32_t)0x00000008UL)

Offset from ADC Base Address: 0x0008

◆ MXC_R_ADC_CTRL0

#define MXC_R_ADC_CTRL0 ((uint32_t)0x00000000UL)

Offset from ADC Base Address: 0x0000

◆ MXC_R_ADC_CTRL1

#define MXC_R_ADC_CTRL1 ((uint32_t)0x00000004UL)

Offset from ADC Base Address: 0x0004

◆ MXC_R_ADC_DATA

#define MXC_R_ADC_DATA ((uint32_t)0x00000044UL)

Offset from ADC Base Address: 0x0044

◆ MXC_R_ADC_DATAFMT

#define MXC_R_ADC_DATAFMT ((uint32_t)0x0000003CUL)

Offset from ADC Base Address: 0x003C

◆ MXC_R_ADC_FIFODMACTRL

#define MXC_R_ADC_FIFODMACTRL ((uint32_t)0x00000040UL)

Offset from ADC Base Address: 0x0040

◆ MXC_R_ADC_INTEN

#define MXC_R_ADC_INTEN ((uint32_t)0x00000050UL)

Offset from ADC Base Address: 0x0050

◆ MXC_R_ADC_INTFL

#define MXC_R_ADC_INTFL ((uint32_t)0x00000054UL)

Offset from ADC Base Address: 0x0054

◆ MXC_R_ADC_RESTART

#define MXC_R_ADC_RESTART ((uint32_t)0x00000030UL)

Offset from ADC Base Address: 0x0030

◆ MXC_R_ADC_SAMPCLKCTRL

#define MXC_R_ADC_SAMPCLKCTRL ((uint32_t)0x0000000CUL)

Offset from ADC Base Address: 0x000C

◆ MXC_R_ADC_SFRADDR

#define MXC_R_ADC_SFRADDR ((uint32_t)0x00000064UL)

Offset from ADC Base Address: 0x0064

◆ MXC_R_ADC_SFRADDROFFSET

#define MXC_R_ADC_SFRADDROFFSET ((uint32_t)0x00000060UL)

Offset from ADC Base Address: 0x0060

◆ MXC_R_ADC_SFRRDDATA

#define MXC_R_ADC_SFRRDDATA ((uint32_t)0x0000006CUL)

Offset from ADC Base Address: 0x006C

◆ MXC_R_ADC_SFRSTATUS

#define MXC_R_ADC_SFRSTATUS ((uint32_t)0x00000070UL)

Offset from ADC Base Address: 0x0070

◆ MXC_R_ADC_SFRWRDATA

#define MXC_R_ADC_SFRWRDATA ((uint32_t)0x00000068UL)

Offset from ADC Base Address: 0x0068

◆ MXC_R_ADC_STATUS

#define MXC_R_ADC_STATUS ((uint32_t)0x00000048UL)

Offset from ADC Base Address: 0x0048

Macros