CAN_ECC

Macros
#define	MXC_F_CAN_ECC_BER_POS   0
#define	MXC_F_CAN_ECC_BER   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_BER_POS))
#define	MXC_F_CAN_ECC_STFER_POS   1
#define	MXC_F_CAN_ECC_STFER   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_STFER_POS))
#define	MXC_F_CAN_ECC_CRCER_POS   2
#define	MXC_F_CAN_ECC_CRCER   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_CRCER_POS))
#define	MXC_F_CAN_ECC_FRMER_POS   3
#define	MXC_F_CAN_ECC_FRMER   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_FRMER_POS))
#define	MXC_F_CAN_ECC_ACKER_POS   4
#define	MXC_F_CAN_ECC_ACKER   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_ACKER_POS))
#define	MXC_F_CAN_ECC_EDIR_POS   5
#define	MXC_F_CAN_ECC_EDIR   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_EDIR_POS))
#define	MXC_F_CAN_ECC_TXWRN_POS   6
#define	MXC_F_CAN_ECC_TXWRN   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_TXWRN_POS))
#define	MXC_F_CAN_ECC_RXWRN_POS   7
#define	MXC_F_CAN_ECC_RXWRN   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_RXWRN_POS))

Detailed Description

Error Code Capture Register.

Macro Definition Documentation

MXC_F_CAN_ECC_ACKER

#define MXC_F_CAN_ECC_ACKER   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_ACKER_POS))

ECC_ACKER Mask

MXC_F_CAN_ECC_ACKER_POS

#define MXC_F_CAN_ECC_ACKER_POS   4

ECC_ACKER Position

MXC_F_CAN_ECC_BER

#define MXC_F_CAN_ECC_BER   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_BER_POS))

ECC_BER Mask

MXC_F_CAN_ECC_BER_POS

#define MXC_F_CAN_ECC_BER_POS   0

ECC_BER Position

MXC_F_CAN_ECC_CRCER

#define MXC_F_CAN_ECC_CRCER   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_CRCER_POS))

ECC_CRCER Mask

MXC_F_CAN_ECC_CRCER_POS

#define MXC_F_CAN_ECC_CRCER_POS   2

ECC_CRCER Position

MXC_F_CAN_ECC_EDIR

#define MXC_F_CAN_ECC_EDIR   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_EDIR_POS))

ECC_EDIR Mask

MXC_F_CAN_ECC_EDIR_POS

#define MXC_F_CAN_ECC_EDIR_POS   5

ECC_EDIR Position

MXC_F_CAN_ECC_FRMER

#define MXC_F_CAN_ECC_FRMER   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_FRMER_POS))

ECC_FRMER Mask

MXC_F_CAN_ECC_FRMER_POS

#define MXC_F_CAN_ECC_FRMER_POS   3

ECC_FRMER Position

MXC_F_CAN_ECC_RXWRN

#define MXC_F_CAN_ECC_RXWRN   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_RXWRN_POS))

ECC_RXWRN Mask

MXC_F_CAN_ECC_RXWRN_POS

#define MXC_F_CAN_ECC_RXWRN_POS   7

ECC_RXWRN Position

MXC_F_CAN_ECC_STFER

#define MXC_F_CAN_ECC_STFER   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_STFER_POS))

ECC_STFER Mask

MXC_F_CAN_ECC_STFER_POS

#define MXC_F_CAN_ECC_STFER_POS   1

ECC_STFER Position

MXC_F_CAN_ECC_TXWRN

#define MXC_F_CAN_ECC_TXWRN   ((uint8_t)(0x1UL << MXC_F_CAN_ECC_TXWRN_POS))

ECC_TXWRN Mask

MXC_F_CAN_ECC_TXWRN_POS

#define MXC_F_CAN_ECC_TXWRN_POS   6

ECC_TXWRN Position