CAN_INTFL

Macros
#define	MXC_F_CAN_INTFL_DOR_POS   0
#define	MXC_F_CAN_INTFL_DOR   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_DOR_POS))
#define	MXC_F_CAN_INTFL_BERR_POS   1
#define	MXC_F_CAN_INTFL_BERR   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_BERR_POS))
#define	MXC_F_CAN_INTFL_TX_POS   2
#define	MXC_F_CAN_INTFL_TX   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_TX_POS))
#define	MXC_F_CAN_INTFL_RX_POS   3
#define	MXC_F_CAN_INTFL_RX   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_RX_POS))
#define	MXC_F_CAN_INTFL_ERPSV_POS   4
#define	MXC_F_CAN_INTFL_ERPSV   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_ERPSV_POS))
#define	MXC_F_CAN_INTFL_ERWARN_POS   5
#define	MXC_F_CAN_INTFL_ERWARN   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_ERWARN_POS))
#define	MXC_F_CAN_INTFL_AL_POS   6
#define	MXC_F_CAN_INTFL_AL   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_AL_POS))
#define	MXC_F_CAN_INTFL_WU_POS   7
#define	MXC_F_CAN_INTFL_WU   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_WU_POS))

Detailed Description

Interrupt Status Register.

Macro Definition Documentation

MXC_F_CAN_INTFL_AL

#define MXC_F_CAN_INTFL_AL   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_AL_POS))

INTFL_AL Mask

MXC_F_CAN_INTFL_AL_POS

#define MXC_F_CAN_INTFL_AL_POS   6

INTFL_AL Position

MXC_F_CAN_INTFL_BERR

#define MXC_F_CAN_INTFL_BERR   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_BERR_POS))

INTFL_BERR Mask

MXC_F_CAN_INTFL_BERR_POS

#define MXC_F_CAN_INTFL_BERR_POS   1

INTFL_BERR Position

MXC_F_CAN_INTFL_DOR

#define MXC_F_CAN_INTFL_DOR   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_DOR_POS))

INTFL_DOR Mask

MXC_F_CAN_INTFL_DOR_POS

#define MXC_F_CAN_INTFL_DOR_POS   0

INTFL_DOR Position

MXC_F_CAN_INTFL_ERPSV

#define MXC_F_CAN_INTFL_ERPSV   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_ERPSV_POS))

INTFL_ERPSV Mask

MXC_F_CAN_INTFL_ERPSV_POS

#define MXC_F_CAN_INTFL_ERPSV_POS   4

INTFL_ERPSV Position

MXC_F_CAN_INTFL_ERWARN

#define MXC_F_CAN_INTFL_ERWARN   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_ERWARN_POS))

INTFL_ERWARN Mask

MXC_F_CAN_INTFL_ERWARN_POS

#define MXC_F_CAN_INTFL_ERWARN_POS   5

INTFL_ERWARN Position

MXC_F_CAN_INTFL_RX

#define MXC_F_CAN_INTFL_RX   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_RX_POS))

INTFL_RX Mask

MXC_F_CAN_INTFL_RX_POS

#define MXC_F_CAN_INTFL_RX_POS   3

INTFL_RX Position

MXC_F_CAN_INTFL_TX

#define MXC_F_CAN_INTFL_TX   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_TX_POS))

INTFL_TX Mask

MXC_F_CAN_INTFL_TX_POS

#define MXC_F_CAN_INTFL_TX_POS   2

INTFL_TX Position

MXC_F_CAN_INTFL_WU

#define MXC_F_CAN_INTFL_WU   ((uint8_t)(0x1UL << MXC_F_CAN_INTFL_WU_POS))

INTFL_WU Mask

MXC_F_CAN_INTFL_WU_POS

#define MXC_F_CAN_INTFL_WU_POS   7

INTFL_WU Position